MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 210
MC68HC908GR4
Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908GR4.pdf
(408 pages)
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Input/Output Ports (I/O)
16.3.2 Data Direction Register A
Technical Data
210
NOTE:
Address:
Data direction register A (DDRA) determines whether each port A pin is
an input or an output. Writing a logic 1 to a DDRA bit enables the output
buffer for the corresponding port A pin; a logic 0 disables the output
buffer.
DDRA3–DDRA0 — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 16-4
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
These read/write bits control port A data direction. Reset clears
DDRA3–DDRA0, configuring all port A pins as inputs.
For More Information On This Product,
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
$0004
Bit 7
0
0
Figure 16-3. Data Direction Register A (DDRA)
shows the port A I/O logic.
Go to: www.freescale.com
Input/Output Ports (I/O)
6
0
0
5
0
0
4
0
0
DDRA3
3
0
MC68HC908GR8 — Rev 4.0
DDRA2
2
0
DDRA1
1
0
MOTOROLA
DDRA0
Bit 0
0
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