MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 320

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MC68HC908GR4

Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Serial Peripheral Interface (SPI)
20.13.3 SPSCK (Serial Clock)
20.13.4 SS (Slave Select)
Technical Data
320
NOTE:
The serial clock synchronizes data transmission between master and
slave devices. In a master MCU, the SPSCK pin is the clock output. In a
slave MCU, the SPSCK pin is the clock input. In full-duplex operation,
the master and slave MCUs exchange a byte of data in eight serial clock
cycles.
When enabled, the SPI controls data direction of the SPSCK pin
regardless of the state of the data direction register of the shared I/O
port.
The SS pin has various functions depending on the current state of the
SPI. For an SPI configured as a slave, the SS is used to select a slave.
For CPHA = 0, the SS is used to define the start of a transmission. See
Transmission
transmission, the SS must be toggled high and low between each byte
transmitted for the CPHA = 0 format. However, it can remain low
between transmissions for the CPHA = 1 format. See
When an SPI is configured as a slave, the SS pin is always configured
as an input. It cannot be used as a general-purpose I/O regardless of the
state of the MODFEN control bit. However, the MODFEN bit can still
prevent the state of the SS from creating a MODF error. See
and Control
A logic 1 voltage on the SS pin of a slave SPI puts the MISO pin in a high-
impedance state. The slave SPI ignores all incoming SPSCK clocks,
even if it was already in the middle of a transmission.
MASTER SS
MISO/MOSI
Freescale Semiconductor, Inc.
SLAVE SS
SLAVE SS
CPHA = 0
CPHA = 1
For More Information On This Product,
Serial Peripheral Interface (SPI)
Register.
Go to: www.freescale.com
Formats. Since it is used to indicate the start of a
Figure 20-12CPHA/SS Timing
BYTE 1
BYTE 2
MC68HC908GR8 — Rev 4.0
Figure
BYTE 3
SPI Status
MOTOROLA
20-12.

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