MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 324

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MC68HC908GR4

Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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Serial Peripheral Interface (SPI)
20.14.2 SPI Status and Control Register
Technical Data
324
SPE — SPI Enable
SPTIE— SPI Transmit Interrupt Enable
The SPI status and control register contains flags to signal these
conditions:
The SPI status and control register also contains bits that perform these
functions:
Freescale Semiconductor, Inc.
This read/write bit enables the SPI module. Clearing SPE causes a
partial reset of the SPI. See
bit.
This read/write bit enables CPU interrupt requests generated by the
SPTE bit. SPTE is set when a byte transfers from the transmit data
register to the shift register. Reset clears the SPTIE bit.
For More Information On This Product,
1 = SPI module enabled
0 = SPI module disabled
1 = SPTE CPU interrupt requests enabled
0 = SPTE CPU interrupt requests disabled
Receive data register full
Failure to clear SPRF bit before next byte is received (overflow
error)
Inconsistent logic level on SS pin (mode fault error)
Transmit data register empty
Enable error interrupts
Enable mode fault error detection
Select master SPI baud rate
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
Resetting the
SPI. Reset clears the SPE
MC68HC908GR8 — Rev 4.0
MOTOROLA

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