MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 354
MC68HC908GR4
Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908GR4.pdf
(408 pages)
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Timer Interface Module (TIM)
22.10.4 TIM Counter Registers
Technical Data
354
NOTE:
Address: T1CNTH, $0021 and T2CNTH, $002C
Address: T1CNTL, $0022 and T2CNTL, $002D
The two read-only TIM counter registers contain the high and low bytes
of the value in the TIM counter. Reading the high byte (TCNTH) latches
the contents of the low byte (TCNTL) into a buffer. Subsequent reads of
TCNTH do not affect the latched TCNTL value until TCNTL is read.
Reset clears the TIM counter registers. Setting the TIM reset bit (TRST)
also clears the TIM counter registers.
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL
by reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset:
Reset:
Read:
Read:
Write:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
Bit 15
Figure 22-10. TIM Counter Register Low (TCNTL)
Bit 7
Bit 7
Bit 7
Figure 22-9. TIM Counter Register High (TCNTH)
0
0
Timer Interface Module (TIM)
Go to: www.freescale.com
= Unimplemented
= Unimplemented
14
6
0
6
6
0
13
5
0
5
5
0
12
4
0
4
4
0
11
3
0
3
3
0
MC68HC908GR8 — Rev 4.0
10
2
0
2
2
0
1
9
0
1
1
0
MOTOROLA
Bit 0
Bit 8
Bit 0
Bit 0
0
0
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