MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 211
MC68HC908GR4
Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908GR4.pdf
(408 pages)
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MC68HC908GR8 — Rev 4.0
MOTOROLA
PTAPUE Bit
NOTES:
1. X = Don’t care
2. Hi-Z = High impedance
3. Writing affects data register, but does not affect input.
4. I/O pin pulled up to V
X
1
0
DDRA Bit
0
0
1
DD
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port A pins.
by internal pullup device
PTA Bit
Freescale Semiconductor, Inc.
X
X
X
For More Information On This Product,
(1)
Table 16-2. Port A Pin Functions
PTAPUEx
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
I/O Pin Mode
Input, V
Input, Hi-Z
Go to: www.freescale.com
Input/Output Ports (I/O)
Output
DD
Figure 16-4. Port A I/O Circuit
RESET
(4)
(2)
V
DD
INTERNAL
PULLUP
DEVICE
Accesses to DDRA
DDRA3–DDRA0
DDRA3–DDRA0
DDRA3–DDRA0
Read/Write
DDRAx
PTAx
PTA3–PTA0
Table 16-2
Read
Pin
Pin
Accesses to PTA
Input/Output Ports (I/O)
summarizes
PTA3–PTA0
PTA3–PTA0
Technical Data
PTA3–PTA0
Write
)
)
Port A
PTAx
211
(3
(3
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