MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 42
MC68HC908GR4
Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908GR4.pdf
(408 pages)
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Memory Map
Technical Data
42
Addr.
† One-time writeable register after each reset, except LVI5OR3 bit. LVI5OR3 bit is only reset via POR (power-on reset).
$001E
$001F
$0020
$0021
$0022
$0023
$0024
$0025
$0026
$0027
Timer 1 Status and Control
Timer 1 Channel 0 Status
Timer 1 Counter Register
Timer 1 Counter Register
Register High (T1MODH)
Register High (T1CH0H)
Configuration Register 2
Configuration Register 1
Timer 1 Counter Modulo
Register Low (T1MODL)
Timer 1 Counter Modulo
Register Low (T1CH0L)
Register Name
and Control Register
Timer 1 Channel 0
Timer 1 Channel 0
Register (T1SC)
High (T1CNTH)
Low (T1CNTL)
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 8)
(CONFIG2)†
(CONFIG1)
(T1SC0)
†
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Freescale Semiconductor, Inc.
For More Information On This Product,
COPRS
Bit 7
Bit 15
Bit 15
CH0F
Bit 15
TOF
Bit 7
Bit 7
Bit 7
0
0
0
0
0
0
0
1
1
0
0
Go to: www.freescale.com
LVISTOP LVIRSTD LVIPWRD LVI5OR3
= Unimplemented
CH0IE
TOIE
14
14
14
6
0
0
0
0
0
6
0
1
6
1
0
6
Memory Map
TSTOP
MS0B
13
13
13
5
0
0
0
1
0
5
0
1
5
1
0
5
Indeterminate after reset
Indeterminate after reset
R = Reserved
MS0A
TRST
12
12
12
4
0
0
0
0
0
0
4
0
1
4
1
0
4
ELS0B
11
11
11
3
0
0
0
0
0
0
3
0
1
3
1
0
3
†
MC68HC908GR8 — Rev 4.0
SSREC
ELS0A
PS2
U = Unaffected
10
10
10
2
0
0
0
0
0
2
0
1
2
1
0
2
STOPENB
STOP
OSC-
TOV0
PS1
1
0
0
0
9
0
1
0
9
1
1
1
0
9
1
MOTOROLA
CH0MAX
SCIBD-
COPD
Bit 0
SRC
PS0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
0
0
0
0
1
1
0
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