MC68HC908GR4 MOTOROLA [Motorola, Inc], MC68HC908GR4 Datasheet - Page 278
MC68HC908GR4
Manufacturer Part Number
MC68HC908GR4
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908GR4.pdf
(408 pages)
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System Integration Module (SIM)
19.4.2.1 Power-On Reset
Technical Data
278
then follows the sequence from the falling edge of RST shown in
19-5.
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
When power is first applied to the MCU, the power-on reset module
(POR) generates a pulse to indicate that power-on has occurred. The
external reset pin (RST) is held low while the SIM counter counts out
4096 CGMXCLK cycles. Sixty-four CGMXCLK cycles later, the CPU and
memories are released from reset to allow the reset vector sequence to
occur.
At power-on, these events occur:
CGMXCLK
Freescale Semiconductor, Inc.
•
IRST
RST
For More Information On This Product,
IAB
A POR pulse is generated.
System Integration Module (SIM)
Go to: www.freescale.com
ILLEGAL ADDRESS RST
Figure 19-6. Sources of Internal Reset
ILLEGAL OPCODE RST
RST PULLED LOW BY MCU
Figure 19-5. Internal Reset Timing
COPRST
32 CYCLES
POR
LVI
INTERNAL RESET
32 CYCLES
MC68HC908GR8 — Rev 4.0
VECTOR HIGH
MOTOROLA
Figure
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