LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 196

• Manufacturer Part Number: LM3S6611-IQC20-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

General-Purpose Timers
10.1
10.2
10.2.1
10.2.2
196
Block Diagram
Figure 10-1. GPTM Module Block Diagram
Functional Description
The main components of each GPTM block are two free-running 16-bit up/down counters (referred
to as TimerA and TimerB), two 16-bit match registers, two prescaler match registers, and two 16-bit
load/initialization registers and their associated control functions. The exact functionality of each
GPTM is controlled by software and configured through the register interface.
Software configures the GPTM using the GPTM Configuration (GPTMCFG) register (see page 207),
the GPTM TimerA Mode (GPTMTAMR) register (see page 208), and the GPTM TimerB Mode
(GPTMTBMR) register (see page 210). When in one of the 32-bit modes, the timer can only act as
a 32-bit timer. However, when configured in 16-bit mode, the GPTM can have its two 16-bit timers
configured in any combination of the 16-bit modes.
GPTM Reset Conditions
After reset has been applied to the GPTM module, the module is in an inactive state, and all control
registers are cleared and in their default states. Counters TimerA and TimerB are initialized to
0xFFFF, along with their corresponding load registers: the GPTM TimerA Interval Load
(GPTMTAILR) register (see page 221) and the GPTM TimerB Interval Load (GPTMTBILR) register
(see page 222). The prescale counters are initialized to 0x00: the GPTM TimerA Prescale
(GPTMTAPR) register (see page 225) and the GPTM TimerB Prescale (GPTMTBPR) register (see
page 226).
32-Bit Timer Operating Modes
Note:
Interrupt
TimerA
Interrupt
TimerB
System
Clock
Both the odd- and even-numbered CCP pins are used for 16-bit mode. Only the
even-numbered CCP pins are used for 32-bit mode.
Interrupt / Config
GPTMCFG
GPTMCTL
GPTMIMR
GPTMRIS
GPTMMIS
GPTMICR
GPTMTAMATCHR
GPTMTBMATCHR
TimerA Control
TimerB Control
GPTMTAPMR
GPTMTBPMR
GPTMTAILR
GPTMTAMR
GPTMTBILR
GPTMTBMR
GPTMTAPR
GPTMTBPR
Preliminary
TA Comparator
TB Comparator
GPTMTBR
0x0000 (Down Counter Modes)
0x0000 (Down Counter Modes)
GPTMAR
En
En
Clock / Edge
Clock / Edge
RTC Divider
October 09, 2007
Detect
Detect
CCP (even)
CCP (odd)