LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 282
LM3S6611-IQC20-A0T
Manufacturer Part Number
LM3S6611-IQC20-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
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Universal Asynchronous Receivers/Transmitters (UARTs)
282
Bit/Field
3:0
7
6
5
4
reserved
Name
RXIC
FEIC
RTIC
TXIC
W1C
W1C
W1C
W1C
Type
RO
Reset
0x00
0
0
0
0
Preliminary
Description
Framing Error Interrupt Clear
The FEIC values are defined as follows:
Receive Time-Out Interrupt Clear
The RTIC values are defined as follows:
Transmit Interrupt Clear
The TXIC values are defined as follows:
Receive Interrupt Clear
The RXIC values are defined as follows:
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Value
Value
Value
Value
0
1
0
1
0
1
0
1
Description
No effect on the interrupt.
Clears interrupt.
Description
No effect on the interrupt.
Clears interrupt.
Description
No effect on the interrupt.
Clears interrupt.
Description
No effect on the interrupt.
Clears interrupt.
October 09, 2007
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