LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 356

• Manufacturer Part Number: LM3S6611-IQC20-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Inter-Integrated Circuit (I
I2C Master Interrupt Clear (I2CMICR)
I2C Master 0 base: 0x4002.0000
I2C Master 1 base: 0x4002.1000
Offset 0x01C
Type WO, reset 0x0000.0000
356
Reset
Reset
Type
Type
Bit/Field
31:1
0
RO
RO
31
15
0
0
Register 8: I
This register clears the raw interrupt.
RO
RO
30
14
0
0
reserved
Name
IC
RO
RO
29
13
0
0
2
C) Interface
2
RO
RO
28
12
0
0
C Master Interrupt Clear (I2CMICR), offset 0x01C
RO
RO
Type
27
11
0
0
WO
RO
RO
RO
26
10
0
0
Reset
0x00
0
RO
RO
25
0
9
0
Preliminary
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Interrupt Clear
This bit controls the clearing of the raw interrupt. A write of 1 clears the
interrupt; otherwise, a write of 0 has no affect on the interrupt state. A
read of this register returns no meaningful data.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
October 09, 2007
RO
RO
17
0
1
0
WO
RO
16
IC
0
0
0