LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 414
LM3S6611-IQC20-A0T
Manufacturer Part Number
LM3S6611-IQC20-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S6611-IQC20-A0T.pdf
(477 pages)
- Current page: 414 of 477
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Analog Comparators
16.3
16.4
414
Initialization and Configuration
The following example shows how to configure an analog comparator to read back its output value
from an internal register.
1.
2.
3.
4.
5.
6.
Change the level of the signal input on C0- to see the OVAL value change.
Register Map
Table 16-4 on page 415 lists the comparator registers. The offset listed is a hexadecimal increment
to the register’s address, relative to the Analog Comparator base address of 0x4003.C000.
ACREFCTL Register
EN Bit Value
EN=1
Enable the analog comparator 0 clock by writing a value of 0x0010.0000 to the RCGC1 register
in the System Control module.
In the GPIO module, enable the GPIO port/pin associated with C0- as a GPIO input.
Configure the internal voltage reference to 1.65 V by writing the ACREFCTL register with the
value 0x0000.030C.
Configure comparator 0 to use the internal voltage reference and to not invert the output on the
C0o pin by writing the ACCTL0 register with the value of 0x0000.040C.
Delay for some time.
Read the comparator output value by reading the ACSTAT0 register’s OVAL value.
RNG Bit Value
RNG=0
RNG=1
Output Reference Voltage Based on VREF Field Value
Total resistance in ladder is 32 R.
V
V
V
The range of internal reference in this mode is 0.825-2.37 V.
Total resistance in ladder is 24 R.
V
V
V
The range of internal reference for this mode is 0.0-2.0625 V.
REF
RE F
R EF
RE F
RE F
RE F
= 0.1375 x V
=
=
=
=
=
0.825
AV
AV
AV
AV
DD
Preliminary
DD
+
DD
DD
×
0.103 VR EF
(
-- -- -- -- -- -- - -- -- -- -- -- -- -- -- -
×
VREF
×
×
(
-- -- -- -- -- -- -- -- -- -- -
R
-- -- -- -- -- -- -- -- -
R
-- -- -- -- -- -- -- -- -
REF
VREF
32
V RE F
V RE F
R
R
24
T
T
+
8
)
)
October 09, 2007
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