LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 402

• Manufacturer Part Number: LM3S6611-IQC20-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Ethernet Controller
Ethernet PHY Management Register 6 – Auto-Negotiation Expansion (MR6)
Base 0x4004.8000
Address 0x06
Type RO, reset 0x0000
402
Reset
Type
Bit/Field
15:5
4
3
2
1
0
RO
15
0
Register 22: Ethernet PHY Management Register 6 – Auto-Negotiation
Expansion (MR6), address 0x06
This register enables software to determine the Auto-Negotiation and Next Page capabilities of the
PHY and the link partner after Auto-Negotiation.
RO
14
0
LPANEGA
reserved
reserved
LPNPA
Name
PRX
PDF
RO
13
0
RO
12
0
RO
Type
11
0
RO
RO
RO
RO
RC
RC
reserved
RO
10
0
0x000
0x000
Reset
0
0
0
0
RO
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Parallel Detection Fault
When set, indicates that more than one technology has been detected
at link up. This bit is cleared when read.
Link Partner is Next Page Able
When set, indicates that the link partner is Next Page Able.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
New Page Received
When set, indicates that a New Page has been received from the link
partner and stored in the appropriate location. This bit remains set until
the register is read.
Link Partner is Auto-Negotiation Able
When set, indicates that the Link partner is Auto-Negotiation Able.
RO
8
0
RO
7
0
RO
6
0
RO
5
0
PDF
RC
4
0
LPNPA
RO
3
0
reserved
RO
2
0
October 09, 2007
PRX
RC
1
0
LPANEGA
RO
0
0