LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 278

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LM3S6611-IQC20-A0T

Manufacturer Part Number
LM3S6611-IQC20-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
Universal Asynchronous Receivers/Transmitters (UARTs)
278
Bit/Field
3:0
4
reserved
Name
RXIM
Type
R/W
RO
Reset
0x00
0
Preliminary
Description
UART Receive Interrupt Mask
On a read, the current mask for the RXIM interrupt is returned.
Setting this bit to 1 promotes the RXIM interrupt to the interrupt controller.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
October 09, 2007

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