LM3S6611-IQC20-A0T ETC2 [List of Unclassifed Manufacturers], LM3S6611-IQC20-A0T Datasheet - Page 28

• Manufacturer Part Number: LM3S6611-IQC20-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Architectural Overview
1.4.3
1.4.3.1
1.4.4
1.4.4.1
28
On the LM3S6611, PWM motion control functionality can be achieved through the motion control
features of the general-purpose timers (using the CCP pins).
CCP Pins (see page 201)
The General-Purpose Timer Module's CCP (Capture Compare PWM) pins are software programmable
to support a simple PWM mode with a software-programmable output inversion of the PWM signal.
Analog Peripherals
For support of analog signals, the LM3S6611 microcontroller offers two analog comparators.
Analog Comparators (see page 411)
An analog comparator is a peripheral that compares two analog voltages, and provides a logical
output that signals the comparison result.
The LM3S6611 microcontroller provides two independent integrated analog comparators that can
be configured to drive an output or generate an interrupt .
A comparator can compare a test voltage against any one of these voltages:
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The comparator can provide its output to a device pin, acting as a replacement for an analog
comparator on the board, or it can be used to signal the application via interrupts to cause it to start
capturing a sample sequence.
Serial Communications Peripherals
The LM3S6611 controller supports both asynchronous and synchronous serial communications
with:
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UART (see page 254)
A Universal Asynchronous Receiver/Transmitter (UART) is an integrated circuit used for RS-232C
serial communications, containing a transmitter (parallel-to-serial converter) and a receiver
(serial-to-parallel converter), each clocked separately.
The LM3S6611 controller includes three fully programmable 16C550-type UARTs that support data
transfer speeds up to 460.8 Kbps. (Although similar in functionality to a 16C550 UART, it is not
register-compatible.) In addition, each UART is capable of supporting IrDA.
Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs reduce CPU interrupt service loading.
The UART can generate individually masked interrupts from the RX, TX, modem status, and error
conditions. The module provides a single combined interrupt when any of the interrupts are asserted
and are unmasked.
An individual external reference voltage
A shared single external reference voltage
A shared internal reference voltage
Three fully programmable 16C550-type UARTs
Two SSI modules
Two I
2
C modules
Preliminary
October 09, 2007