AM79C970AKCW AMD [Advanced Micro Devices], AM79C970AKCW Datasheet - Page 106
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AM79C970AKCW
Manufacturer Part Number
AM79C970AKCW
Description
PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C970AKCW.pdf
(219 pages)
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PCI Configuration Registers
The following is a list of those registers that would typi-
cally need to be programmed once during the initializa-
tion of the PCnet-PCI II controller within a system:
Setup Registers
The following is a list of those registers that would typi-
cally need to be programmed once during the setup of
the PCnet-PCI II controller within a system. The control
bits in each of these registers typically do not need to be
modified once they have been written. However, there
are no restrictions as to how many times these registers
may actually be accessed. Note that if the default power
up values of any of these registers is acceptable to the
application, then such registers need never be ac-
cessed at all. Registers marked with “^” may be pro-
grammable through the EEPROM read operation, and
therefore do not necessarily need to be written to by the
system initialization procedure or by the driver software.
Registers marked with “*” will be initialized by the initiali-
zation block read operation.
106
PCI I/O Base Address or Memory Mapped I/O Base
Address register
PCI Expansion ROM Base Address register
PCI Interrupt Line register
PCI Latency Timer register
PCI Status register
PCI Command register
CSR1
CSR2
CSR3
CSR4
CSR5
CSR8*
CSR9*
CSR10*
CSR11*
CSR12*
CSR13*
CSR14*
CSR15*
CSR24*
CSR25*
CSR30*
AMD
Initialization Block Address[15:0]
Initialization Block Address[31:16]
Interrupt Masks and Deferral Control
Test and Features Control
Extended Control and Interrupt
Logical Address Filter[15:0]
Logical Address Filter[31:16]
Logical Address Filter[47:32]
Logical Address Filter[63:48]
Physical Address[15:0]
Physical Address[31:16]
Physical Address[47:32]
Mode
Base Address of Receive Descriptor
Ring Lower
Base Address of Receive Descriptor
Ring Upper
Base Address of Transmit Descriptor
Ring Lower
P R E L I M I N A R Y
Am79C970A
Running Registers
The following is a list of those registers that would typi-
cally need to be periodically read and perhaps written
during the normal running operation of the PCnet-PCI II
controller within a system. Each of these registers con-
tains control bits or status bits or both.
PCI Configuration Registers
PCI Vendor ID (Offset 00h)
The PCI Vendor ID register is a 16-bit register that iden-
tifies the manufacturer of the PCnet-PCI II controller.
Advanced Micro Devices, Inc.’s (AMD) Vendor ID is
1022h. Note that this vendor ID is not the same as the
Manufacturer ID in CSR88 and CSR89. The vendor ID is
assigned by the PCI Special Interest Group.
The PCI Vendor ID register is located at offset 00h in the
PCI Configuration Space. It is read only.
PCI Device ID Register (Offset 02h)
The PCI Device ID register is a 16-bit register that
uniquely identifies the PCnet-PCI II controller within
AMD’s product line. The PCnet-PCI II controller Device
ID is 2000h. Note that this Device ID is not the same as
the Part number in CSR88 and CSR89. The Device ID is
assigned by Advanced Micro Devices, Inc.
CSR31*
CSR47
CSR76*
CSR78*
CSR82
CSR100
CSR122
BCR2^
BCR4^
BCR5^
BCR6^
BCR7^
BCR9^
BCR18^
BCR20
RAP
CSR0
CSR4
CSR5
CSR112
CSR114
PCI Status register
Base Address of Transmit Descriptor
Ring Upper
Polling Interval
Receive Descriptor Ring Length
Transmit Descriptor Ring Length
Bus Activity Timer
Memory Error Timeout
Receiver Packet Alignment Control
Miscellaneous Configuration
Link Status LED
LED1 Status
LED2 Status
LED3 Status
Full-Duplex Control
Bus and Burst Control
Software Style
Register Address Port
PCnet-PCI II Controller Status
Test and Features Control
Extended Control and Interrupt
Missed Frame Count
Receive Collision Count
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