AM79C970AKCW AMD [Advanced Micro Devices], AM79C970AKCW Datasheet - Page 165
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AM79C970AKCW
Manufacturer Part Number
AM79C970AKCW
Description
PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C970AKCW.pdf
(219 pages)
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15–12 ZEROS
11–0
CXDA+00h
CXDA+04h
CXDA+08h
CXDA+0Ch
CXDA+00h
CXDA+04h
CXDA+08h
CXDA+0Ch
Address
Address
CXDA+00h
CXDA+02h
CXDA+04h
CXDA+06h
Address
MCNT
BUFF
BUFF
OWN
OWN
31
31
BUFF
OWN
15
1
preamble plus a valid SFD de-
tected, followed by 7 bytes of
frame data. This requirement is
unvarying, regardless of the ad-
dress matching mechanisms in
force at the time of reception. (I.e.
physical, logical, broadcast or
promiscuous). The PCnet-PCI II
controller implementation of this
counter may not be compatible
with the ILACC RPC definition.
This field is reserved. PCnet-PCI
II controller will write ZEROs to
these locations.
Message Byte Count is the
length in bytes of the received
message, expressed as an un-
signed binary integer. MCNT is
valid only when ERR is clear and
ENP is set. MCNT is written by
the PCnet-PCI II controller and
cleared by the host.
UFLO
UFLO
ERR
ERR
30
30
UFLO
ERR
ADD_/ MORE
ADD_/ MORE
14
1
NO_
FCS
DEF
DEF
NO_
FCS
EX
EX
29
29
Table 44. Transmit Descriptor (SWSTYLE = 1,2)
Table 43. Transmit Descriptor (SWSTYLE = 0)
Table 45. Transmit Descriptor (SWSTYLE = 3)
ADD_/
LTINT
LTINT
LCOL
LCOL
NO_
FCS
DEF
EX
13
28
28
1
/
/
LCAR RTRY
LCAR RTRY
P R E L I M I N A R Y
MORE
ONE
ONE
LTINT
LCOL
27
27
12
1
/
Am79C970A
DEF
DEF
26
26
LCAR
ONE
TBADR[31:0]
RESERVED
11
TBADR[15:0]
RMD3
Bit
31–0
Transmit Descriptors
When SWSTYLE (BCR20, bits 7–0) is set to ZERO, the
software structures are defined to be 16 bits wide, and
transmit descriptors, (CXDA = Current Transmit De-
scriptor Address), are as shown in Table 43.
When SWSTYLE (BCR 20, bits 7–0) is set to ONE or
TWO, the software structures are defined to be 32 bits
wide, and transmit descriptors, (CXDA = Current Trans-
mit Descriptor Address), are as shown in Table 44.
When SWSTYLE (BCR 20, bits 7–0) is set to THREE,
then the software structures are defined to be 32 bits
wide, and transmit descriptors, (CXDA = Current Trans-
mit Descriptor Address), are as shown in Table 45.
TBADR[31:0]
RESERVED
STP
STP
25
25
RTRY
DEF
Name
RES
10
ENP
ENP
24
24
BPE
BPE
TDR
STP
23
TDR
23
9
Description
Reserved locations.
BCNT
22–16
22–16
RES
RES
ENP
8
TDR
15–12
15–12
1111
1111
TBADR[23:16]
11–4
11–4
RES
RES
AMD
7–0
BCNT
BCNT
TRC
TRC
3–0
3–0
165
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