AM79C970AKCW AMD [Advanced Micro Devices], AM79C970AKCW Datasheet - Page 94
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AM79C970AKCW
Manufacturer Part Number
AM79C970AKCW
Description
PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C970AKCW.pdf
(219 pages)
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controller assumes that an external pulldown device is
holding the EESK/LED1/SFBD pin low indicating that
there is no EEPROM in the system. Note that if the de-
signer creates a system that contains an LED circuit on
the EESK/LED1/SFBD pin but has no EEPROM pre-
sent, then the EEPROM auto-detection function will in-
correctly conclude that an EEPROM is present in the
system. However, this will not pose a problem for the
PCnet-PCI II controller, since the checksum verification
will fail.
Direct Access to the Microwire Interface
The user may directly access the Microwire port through
the EEPROM register, BCR19. This register contains
bits that can be used to control the Microwire interface
pins. By performing an appropriate sequence of ac-
cesses to BCR19, the user can effectively write to and
read from the EEPROM. This feature may be used by a
system configuration utility to program hardware con-
figuration information into the EEPROM.
EEPROM-programmable Registers
The following registers contain configuration informa-
tion that will be programmed automatically during the
EEPROM read operation:
94
I/O offsets 0h–Fh
BCR2
BCR4
AMD
Address PROM locations
Miscellaneous Configuration
register
Link Status LED register
P R E L I M I N A R Y
Am79C970A
If PREAD (BCR19, bit 14) and PVALID (BCR19, bit 15)
are cleared to ZERO, then the EEPROM read has
experienced a failure and the contents of the EEPROM
programmable BCR register will be set to default
H_RESET values. The content of the Address PROM
locations, however, will not be cleared.
Note that accesses to the Address PROM I/O locations
do not directly access the Address EEPROM itself. In-
stead, these accesses are routed to a set of shadow reg-
isters on board the PCnet-PCI II controller that are
loaded with a copy of the EEPROM contents during the
automatic read operation that immediately follows the
H_RESET operation.
BCR5
BCR6
BCR7
BCR9
BCR18
BCR22
LED1 Status register
LED2 Status register
LED3 Status register
Full-Duplex Control register
Burst and Bus Control
register
PCI Latency register
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