AM79C970AKCW AMD [Advanced Micro Devices], AM79C970AKCW Datasheet - Page 43
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AM79C970AKCW
Manufacturer Part Number
AM79C970AKCW
Description
PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C970AKCW.pdf
(219 pages)
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Bus Master DMA Transfers
There are four primary types of DMA transfers. The
PCnet-PCI II controller uses non-burst as well as burst
cycles for read and write access to the main memory.
Basic Non-Burst Read Transfer
By default, the PCnet-PCI II controller uses non-burst
cycles in all bus master read operations. All
PCnet-PCI II controller non-burst read accesses are of
the PCI command type Memory Read (type 6). Note that
during a non-burst read operation, all byte lanes will al-
ways be active. The PCnet-PCI II controller will inter-
nally discard unneeded bytes.
FRAME
IRDY
C/BE
REQ
GNT
CLK
AD
Figure 12. Bus Acquisition
1
P R E L I M I N A R Y
Am79C970A
2
3
The PCnet-PCI II controller typically performs more
than one non-burst read transactions within a single bus
mastership period. FRAME is dropped between con-
secutive non-burst read cycles. REQ however stays
asserted until FRAME is asserted for the last
transaction. The PCnet-PCI II controller supports zero
wait state read cycles. It asserts IRDY immediately after
the address phase and at the same time starts
sampling DEVSEL.
4
ADDR
CMD
5
19436A-15
AMD
43
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