MA180023 Microchip Technology, MA180023 Datasheet - Page 212
MA180023
Manufacturer Part Number
MA180023
Description
MODULE PLUG-IN PIC18F46J11 PIM
Manufacturer
Microchip Technology
Series
PIC®r
Datasheet
1.MA180023.pdf
(528 pages)
Specifications of MA180023
Accessory Type
Plug-In Module (PIM) - PIC18F46J11
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
PIC18
Supported Devices
Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
Silicon Manufacturer
Microchip
Core Architecture
PIC
Core Sub-architecture
PIC18
Silicon Core Number
PIC18F
Silicon Family Name
PIC18FxxJxx
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
For Use With
DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MA180023
Manufacturer:
Microchip Technology
Quantity:
135
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PIC18F46J11 FAMILY
14.2
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
• Timer with Gated Control
FIGURE 14-1:
DS39932C-page 212
T3G
From Timer0
Overflow
From Timer2
Match PR2
Note 1:
T3GSS<1:0>
Timer3 Operation
2:
3:
T3GPOL
ST Buffer is high-speed type when using T3CKI.
Timer3 register increments on rising edge.
Synchronize does not operate while in Sleep.
Set Flag bit,
TMR3IF, on
Overflow
TIMER3 BLOCK DIAGRAM
00
10
01
TMR3ON
T3GTM
TMR3H
TMR3
T3G_IN
(2)
D
R
CK
TMR3L
Q
Q
TMR3CS<1:0>
0
1
T3GGO/T3DONE
Q
Internal
Internal
F
T3CKI
OSC
Clock
Clock
F
OSC
EN
/4
D
external clock from the T3CKI pin (on the rising edge
The operating mode is determined by the clock select
bits, TMR3CSx (T3CON<7:6>). When the TMR3CSx bits
are cleared (= 00), Timer3 increments on every internal
instruction cycle (F
Timer3 clock source is the system clock (F
when it is ‘10’, Timer3 works as a counter from the
after the first falling edge) or the Timer1 oscillator.
Single Pulse
Acq. Control
10
01
00
T3CLK
T3GSPM
T3CKPS<1:0>
T3SYNC
Prescaler
1, 2, 4, 8
TMR3ON
0
1
2
0
1
Internal
OSC
F
Clock
OSC
T3GVAL
TMR3GE
/4). When TMR3CSx = 01, the
/2
© 2009 Microchip Technology Inc.
Q1
Synchronized
Synchronize
Interrupt
Clock Input
D
EN
det
det
Sleep Input
Q
(3)
Set
TMR3GIF
Data Bus
RD
T3GCON
OSC
), and
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