MA180023 Microchip Technology, MA180023 Datasheet - Page 282

• Manufacturer Part Number: MA180023
• Description: MODULE PLUG-IN PIC18F46J11 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180023

• Accessory Type: Plug-In Module (PIM) - PIC18F46J11
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: PIC18
• Supported Devices: Stand-alone Or W/ HPC(DM183022) Or PIC18(DM183032)
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HPC Explorer Board (DM183022) or PIC18 Explorer Board (DM183032)
• For Use With: DM183032 - BOARD EXPLORER PICDEM PIC18DM183022 - BOARD DEMO PIC18FXX22 64/80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F46J11 FAMILY
18.4.6
The following steps would typically be taken to enable
and use the SPI DMA module:
1.
2.
3.
DS39932C-page 282
Configure the I/O pins, which will be used by
MSSP2.
a)
b)
c)
d)
Configure and enable MSSP2 for the desired
SPI operating mode.
a)
b)
Configure the SPI DMA engine.
a)
b)
c)
d)
e)
Assign SCK2, SDO2, SDI2 and SS2 to RPn
pins as appropriate for the SPI mode which
will be used. Only functions which will be
used need to be assigned to a pin.
Initialize the associated LATx registers for
the desired Idle SPI bus state.
If Open-Drain Output mode on SDO2 and
SCK2 (Master mode) is desired, set
ODCON3<1>.
Configure corresponding TRISx bits for
each I/O pin used
Select the desired operating mode (Master
or Slave, SPI Mode 0, 1, 2 and 3) and
configure the module by writing to the
SSP2STAT and SSP2CON1 registers.
Enable MSSP2 by setting SSP2CON1<5> = 1.
Select the desired operating mode by
writing
DMACON2 and DMACON1.
Initialize the TXADDRH/TXADDRL Pointer
(Full-Duplex or Half-Duplex Transmit Only
mode).
Initialize the RXADDRH/RXADDRL Pointer
(Full-Duplex or Half-Duplex Receive Only
mode).
Initialize the DMABCH/DMABCL Byte Count
register with the number of bytes to be
transferred in the next SPI DMA operation.
Set the DMAEN bit (DMACON1<0>).
In SPI Master modes, this will initiate a DMA
transaction. In SPI Slave modes, this will
complete the initialization process, and the
module will now be ready to begin receiving
and/or transmitting data to the master
device
transaction.
USING THE SPI DMA MODULE
once
the
appropriate
the
master
values
starts
the
to
4.
Example 18-2 provides example code demonstrating
the initialization process and the steps needed to use
the SPI DMA module to perform a 512-byte
Full-Duplex, Master mode transfer.
Detect the SSP2IF interrupt condition (PIR3<7).
a)
b)
If the interrupt was configured to occur at
the completion of the SPI DMA transaction,
the DMAEN bit (DMACON1<0>) will be
clear. User firmware may prepare the
module for another transaction by repeating
steps 3.b through 3.e.
If the interrupt was configured to occur prior
to the completion of the SPI DMA trans-
action, the DMAEN bit may still be set,
indicating the transaction is still in progress.
User firmware would typically use this inter-
rupt condition to begin preparing new data
for the next DMA transaction. Firmware
should not repeat steps 3.b. through 3.e.
until the DMAEN bit is cleared by the
hardware, indicating the transaction is
complete.
© 2009 Microchip Technology Inc.