C8051F326DK Silicon Laboratories Inc, C8051F326DK Datasheet - Page 125

KIT DEV FOR C8051F326/7

C8051F326DK

Manufacturer Part Number
C8051F326DK
Description
KIT DEV FOR C8051F326/7
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F326DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F326/F327
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F326
Silicon Family Name
C8051F32x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F326, C8051F327
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1306
Bit7:
Bit6:
Bits5–2: Reserved: Read = 0000b. Must write 0000b.
Bits1–0: SB0PS[1:0]: Baud Rate Prescaler Select.
Bits7–0: SBUF0[7:0]: Serial Data Buffer Bits 7–0 (MSB–LSB)
SB0CLK
R/W
R/W
Bit7
Bit7
SFR Definition 13.4. SBCON0: UART0 Baud Rate Generator Control
SB0CLK: Baud Rate Generator Clock Source.
0: SYSCLK is used as Baud Rate Generator Clock Source.
1: USBCLK is used as Baud Rate Generator Clock Source.
SB0RUN: Baud Rate Generator Enable.
0: Baud Rate Generator is disabled. UART0 will not function.
1: Baud Rate Generator is enabled.
00: Prescaler = 12
01: Prescaler = 4
10: Prescaler = 48
11: Prescaler = 1
This SFR is used to both send data from the UART and to read received data from the
UART0 receive FIFO.
Write: When data is written to SBUF0, it goes to the transmit shift register and is held for
serial transmission. Writing a byte to SBUF0 initiates the transmission.
Read: Reading SBUF0 retrieves data from the receive FIFO. When read, the oldest byte in
the receive FIFO is returned, and removed from the FIFO. Up to three bytes may be held in
the FIFO. If there are additional bytes available in the FIFO, the RI0 bit will remain at logic
‘1’, even after being cleared by software.
SB0RUN Reserved Reserved Reserved Reserved SB0PS1
R/W
R/W
Bit6
Bit6
SFR Definition 13.3. SBUF0: UART0 Data Buffer
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.1
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
C8051F326/7
SFR Address:
SFR Address:
SB0PS0
R/W
R/W
Bit0
Bit0
0x99
0x91
00000000
00000000
Addressable
Reset Value
Reset Value
Bit
125

Related parts for C8051F326DK