C8051F326DK Silicon Laboratories Inc, C8051F326DK Datasheet - Page 129

• Manufacturer Part Number: C8051F326DK
• Description: KIT DEV FOR C8051F326/7
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F326DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F326/F327
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F326
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F326, C8051F327
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1306

14.1.2. Mode 1: 16-bit Timer
Mode 1 operation is the same as Mode 0, except that the timer registers use all 16 bits. The timers are
enabled and configured in Mode 1 in the same manner as for Mode 0.
14.1.3. Mode 2: 8-bit Timer with Auto-Reload
Mode 2 configures Timer 0 and Timer 1 to operate as 8-bit timers with automatic reload of the start value.
TL0 holds the count and TH0 holds the reload value. When the counter in TL0 overflows from all ones to
0x00, the timer overflow flag TF0 (TCON.5) is set and the counter in TL0 is reloaded from TH0. If Timer 0
interrupts are enabled, an interrupt will occur when the TF0 flag is set. The reload value in TH0 is not
changed. TL0 must be initialized to the desired value before enabling the timer for the first count to be cor-
rect. When in Mode 2, Timer 1 operates identically to Timer 0.
Both timers are enabled and configured in Mode 2 in the same manner as Mode 0. Setting the TR0 bit
(TCON.4) enables the timer when GATE0 (TMOD.3) is logic 0 or when GATE0 is logic 1 and the input sig-
nal /INT0 is active (see Section “6.3.2. External Interrupts” on page 49 for details on the external input sig-
nals /INT0 and /INT1).
G
A
T
E
1
C
T
1
/
M
T
1
1
TMOD
M
T
1
0
G
A
T
E
0
C
T
0
/
M
T
0
1
M
T
0
0
Pre-scaled Clock
SYSCLK
GATE0
/INT0
Figure 14.2. T0 Mode 2 Block Diagram
CKCON
M
T
1
TR0
M
T
0
0
1
C
S
A
1
C
S
A
0
Rev. 1.1
TCLK
(8 bits)
(8 bits)
TH0
TL0
Reload
C8051F326/7
TR1
TR0
TF1
TF0
IE1
IT1
IE0
IT0
Interrupt
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