C8051F326DK Silicon Laboratories Inc, C8051F326DK Datasheet - Page 20
C8051F326DK
Manufacturer Part Number
C8051F326DK
Description
KIT DEV FOR C8051F326/7
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F326DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F326/F327
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F326
Silicon Family Name
C8051F32x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F326, C8051F327
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1306
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C8051F326/7
1.3.
The Universal Serial Bus Controller (USB0) is a USB 2.0 peripheral with integrated transceiver and end-
point FIFO RAM. The controller supports both full and low speed modes. A total of three endpoint pipes are
available: a bi-directional control endpoint (Endpoint0) and a data endpoint (Endpoint1) with one IN pipe
and one OUT pipe.
A 256 block of XRAM is used as dedicated USB FIFO space. This FIFO space is distributed between
Endpoint0 and Endpoint1. Endpoint0 is 64 bytes, and Endpoint1 has a 64 byte IN pipe and a 128 byte OUT
pipe.
USB0 can be operated as a Full or Low Speed function. The on-chip 4x Clock Multiplier and clock recovery
circuitry allow both Full and Low Speed options to be implemented with the on-chip precision oscillator as
the USB clock source. An external clock source can also be used with the 4x Clock Multiplier to generate
the USB clock.
The USB Transceiver is USB 2.0 compliant, and includes on-chip matching and pullup resistors. The pul-
lup resistors can be enabled/disabled in software, and will appear on the D+ or D– pin according to the
software-selected speed setting (full or low speed).
1.4.
C8051F326/7 devices include a voltage regulator (REG0). When enabled, the REG0 output appears on
the VDD pin and can be used to power external devices. REG0 can be enabled/disabled by software.
20
D+
D-
Universal Serial Bus Controller
Voltage Regulator
VDD
Transceiver
Figure 1.8. USB Controller Block Diagram
Transfer
Control
Data
Serial Interface Engine (SIE)
Rev. 1.1
IN
(256B RAM)
USB FIFOs
Endpoint0
Endpoint1
IN/OUT
OUT
Status, and
Registers
Interrupt
Control,
USB
CIP-51 Core
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