C8051F326DK Silicon Laboratories Inc, C8051F326DK Datasheet - Page 75

• Manufacturer Part Number: C8051F326DK
• Description: KIT DEV FOR C8051F326/7
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F326DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F326/F327
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F326
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F326, C8051F327
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1306

10.4. 4x Clock Multiplier
The 4x Clock Multiplier allows a 12 MHz oscillator to generate the 48 MHz clock required for Full Speed
USB communication (see Section “12.4. USB Clock Configuration” on page 94). A divided version of the
Multiplier output can also be used as the system clock. See Section “10.5. System and USB Clock Selec-
tion” on page 76 for details on system clock and USB clock source selection.
The 4x Clock Multiplier is configured via the CLKMUL register. The procedure for configuring and enabling
the 4x Clock Multiplier is as follows:
Important Note: When using an external clock as the input to the 4x Clock Multiplier, the external source
must be stable before the Multiplier is initialized. See Section “10.5. System and USB Clock Selection” on
page 76 for details on clock selection.
Bit7:
Bit6:
Bit5:
Bits4–1: Unused. Read = 0000b. Write = don’t care.
Bit0:
MULEN
R/W
Bit7
1. Reset the Multiplier by writing 0x00 to register CLKMUL.
2. Select the Multiplier input source via the MULSEL bits.
3. Enable the Multiplier with the MULEN bit (CLKMUL | = 0x80).
4. Delay for >5 µs.
5. Initialize the Multiplier with the MULINIT bit (CLKMUL | = 0xC0).
6. Poll for MULRDY => ‘1’.
MULEN: Clock Multiplier Enable
0: Clock Multiplier disabled.
1: Clock Multiplier enabled.
MULINIT: Clock Multiplier Initialize
This bit should be a ‘0’ when the Clock Multiplier is enabled. Once enabled, writing a ‘1’ to
this bit will initialize the Clock Multiplier. The MULRDY bit reads ‘1’ when the Clock Multiplier
is stabilized.
MULRDY: Clock Multiplier Ready
This read-only bit indicates the status of the Clock Multiplier.
0: Clock Multiplier not ready.
1: Clock Multiplier ready (locked).
MULSEL: Clock Multiplier Input Select
This bit selects the clock supplied to the Clock Multiplier.
MULINIT MULRDY
R/W
Bit6
SFR Definition 10.4. CLKMUL: Clock Multiplier Control
MULSEL
0
1
Bit5
R
R/W
Bit4
—
Internal Oscillator
Selected Clock
External Clock
Rev. 1.1
R/W
Bit3
—
R/W
Bit2
—
R/W
Bit1
—
C8051F326/7
MULSEL 00000000
R/W
Bit0
SFR Address
Reset Value
0xB9
75