C8051F560-TB Silicon Laboratories Inc, C8051F560-TB Datasheet - Page 109
![BOARD PROTOTYPE W/C8051F560](/photos/9/25/92557/c8051f560-tb_sml.jpg)
C8051F560-TB
Manufacturer Part Number
C8051F560-TB
Description
BOARD PROTOTYPE W/C8051F560
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.TOOLSTICK560DC.pdf
(302 pages)
Specifications of C8051F560-TB
Contents
Board
Processor To Be Evaluated
C8051F56x
Processor Series
C8051F56x
Interface Type
USB
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V to 5.25 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F55x, C8051F56x, C8051F57x
For Use With
336-1691 - KIT DEVELOPMENT FOR C8051F560
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1694
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Table 12.3. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
IT01CF
LIN0ADR
LIN0CF
LIN0DAT
OSCICN
OSCICRS
OSCIFIN
OSCXCN
P0
P0MASK
P0MAT
P0MDIN
P0MDOUT
P0SKIP
P1
P1MASK
P1MAT
P1MDIN
P1MDOUT
P1SKIP
P2
P2MASK
P2MAT
P2MDIN
P2MDOUT
P2SKIP
P3
P3MASK
P3MAT
P3MDIN
P3MDOUT
P3SKIP
P4
P4MDOUT
PCA0CN
PCA0CPH0
Register
Address
0xAE
0xAE
0xFC
0xE4
0xD3
0xC9
0xD2
0xA1
0xA2
0x9E
0xA4
0xD4
0xA5
0xD5
0xA0
0xB2
0xB1
0xA6
0xD6
0xB0
0xAF
0xD7
0xB5
0xAF
0xD8
0x9F
0x80
0xF2
0xF1
0xF1
0x90
0xF4
0xF3
0xF2
0xF3
0xF4
INT0/INT1 Configuration
LIN0 Address
LIN0 Configuration
LIN0 Data
Internal Oscillator Control
Internal Oscillator Coarse Control
Internal Oscillator Fine Calibration
External Oscillator Control
Port 0 Latch
Port 0 Mask Configuration
Port 0 Match Configuration
Port 0 Input Mode Configuration
Port 0 Output Mode Configuration
Port 0 Skip
Port 1 Latch
Port 1 Mask Configuration
Port 1 Match Configuration
Port 1 Input Mode Configuration
Port 1 Output Mode Configuration
Port 1 Skip
Port 2 Latch
Port 2 Mask Configuration
Port 2 Match Configuration
Port 2 Input Mode Configuration
Port 2 Output Mode Configuration
Port 2 Skip
Port 3 Latch
Port 3 Mask Configuration
Port 3 Match Configuration
Port 3 Input Mode Configuration
Port 3 Output Mode Configuration
Port 3 Skip
Port 4 Latch
Port 4 Output Mode Configuration
PCA Control
PCA Capture 0 High
Rev. 1.1
Description
C8051F55x/56x/57x
Page
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