C8051F560-TB Silicon Laboratories Inc, C8051F560-TB Datasheet - Page 17
![BOARD PROTOTYPE W/C8051F560](/photos/9/25/92557/c8051f560-tb_sml.jpg)
C8051F560-TB
Manufacturer Part Number
C8051F560-TB
Description
BOARD PROTOTYPE W/C8051F560
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.TOOLSTICK560DC.pdf
(302 pages)
Specifications of C8051F560-TB
Contents
Board
Processor To Be Evaluated
C8051F56x
Processor Series
C8051F56x
Interface Type
USB
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V to 5.25 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F55x, C8051F56x, C8051F57x
For Use With
336-1691 - KIT DEVELOPMENT FOR C8051F560
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1694
- Current page: 17 of 302
- Download datasheet (3Mb)
C2CK/RST
VREGIN
GNDA
VDDA
GND
VDD
Internal Oscillator
Programming
C2D
Power On
Hardware
Voltage Regulator
Debug /
Reset
(±0.5%)
Figure 1.1. C8051F568-9 and ‘F570-5 (40-pin) Block Diagram
System Clock Setup
(LDO)
Reset
Clock Multiplier
CIP-51 8051 Controller
External Oscillator
XTAL1
32 or 16 kB Flash
Program Memory
Core (50 MHz)
256 Byte RAM
2 kB XRAM
XTAL2
SFR
Bus
Rev. 1.1
VDD
CAN 2.0B
PCA/WDT
Timers 0,
6 channel
External Memory Interface
UART0
LIN 2.1
12-bit
200ksps
ADC
1, 2, 3
Analog Peripherals
Digital Peripherals
SPI
I2C
Port I/O Configuration
Crossbar Control
Reference
Voltage
CP0, CP0A
Comparator 0
CP1, CP1A
Comparator 1
VREF
C8051F55x/56x/57x
M
A
U
X
VREF
Crossbar
Decoder
Priority
+
+
-
-
VDD
VREF
P0 – P3
Temp
Sensor
GND
Drivers
Drivers
Drivers
Drivers
Port 0
Port 1
Port 2
Port 3
Port 4
Driver
VIO
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P4.0/C2D
17
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