IPR-NIOS Altera, IPR-NIOS Datasheet - Page 200

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

8–14
bgeu
Nios II Processor Reference Handbook
Operation:
Assembler Syntax:
Example:
Description:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
B
if ((unsigned) rA >= (unsigned) rB)
then PC ← PC + 4 + σ (IMM16)
else PC ← PC + 4
bgeu rA, rB, label
bgeu r6, r7, top_of_loop
If (unsigned) rA >= (unsigned) rB, then bgeu transfers program control to the instruction at
label. In the instruction encoding, the offset given by IMM16 is treated as a signed number of
bytes relative to the instruction immediately following bgeu. The two least-significant bits of
IMM16 are always zero, because instruction addresses must be word-aligned.
Misaligned destination address
I
A = Register index of operand rA
B = Register index of operand rB
IMM16 = 16-bit signed immediate value
23
22
21
20
19
18
17
16
15
IMM16
branch if greater than or equal unsigned
14
13
12
11
10
9
8
Chapter 8: Instruction Set Reference
December 2010 Altera Corporation
7
6
5
Instruction Set Reference
4
0x2e
3
2
1
0