IPR-NIOS Altera, IPR-NIOS Datasheet - Page 28

• Manufacturer Part Number: IPR-NIOS
• Description: IP NIOS II MEGACORE RENEW
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-NIOS

• License: Renewal License
• Lead Free Status / RoHS Status: Not applicable / Not applicable

2–6
Nios II Processor Reference Handbook
f
f
1
You can add floating-point custom instructions to any Nios II processor core using the
Nios II Processor parameter editor. The floating-point division hardware requires
more resources than the other instructions. The parameter editor allows you to omit
the floating-point division hardware for cases in which code running on your
hardware design does not make heavy use of floating-point division. When you omit
the floating-point divide instruction, the Nios II compiler implements floating-point
division in software.
To add floating-point custom instructions to your Nios II processor core, refer to
“Custom Instructions Page” in the
chapter of the Nios II Processor Reference Handbook.
The Nios II floating-point custom instructions are based on the Altera
megafunctions.
For details on each individual floating-point megafunction, including acceleration
factors and device resource usage, refer to the megafunction user guides, available on
the
The Nios II software development tools recognize C code that takes advantage of the
floating-point instructions present in the processor core. When the floating-point
custom instructions are present in your target hardware, the Nios II compiler
compiles your code to use the custom instructions for floating-point operations,
including addition, subtraction, multiplication, division and the newlib math library.
Software Development Considerations
The best choice for your hardware design depends on a balance among floating-point
usage, hardware resource usage, and performance. While the floating-point custom
instructions speed up floating-point arithmetic, they substantially add to the size of
your hardware design. If resource usage is an issue, consider reworking your
algorithms to minimize floating-point arithmetic.
You can use #pragma directives in your software to compare hardware and software
implementations of the floating-point instructions. The following #pragma directives
instruct the Nios II compiler to ignore the floating-point instructions and generate
software implementations. The scope of these #pragma directives is the entire C file.
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The Nios II instruction set simulator (ISS) does not support custom instructions. If you
need to run your software on the ISS, disable the floating-point custom instructions in
software with the #pragma directives.
#pragma no_custom_fadds—Forces software implementation of floating-point add
#pragma no_custom_fsubs—Forces software implementation of floating-point
subtract
#pragma no_custom_fmuls—Forces software implementation of floating-point
multiply
#pragma no_custom_fdivs—Forces software implementation of floating-point
divide
IP and Megafunctions
literature page on the Altera website.
Instantiating the Nios II Processor in SOPC Builder
December 2010 Altera Corporation
Chapter 2: Processor Architecture
®
Arithmetic Logic Unit
floating-point