IC MCU 1.5K FLASH 16-TSSOP

MC68HC908QY1VDTE

Manufacturer Part NumberMC68HC908QY1VDTE
DescriptionIC MCU 1.5K FLASH 16-TSSOP
ManufacturerFreescale Semiconductor
SeriesHC08
MC68HC908QY1VDTE datasheet
 


Specifications of MC68HC908QY1VDTE

Core ProcessorHC08Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, PWM
Number Of I /o13Program Memory Size1.5KB (1.5K x 8)
Program Memory TypeFLASHRam Size128 x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 VOscillator TypeInternal
Operating Temperature-40°C ~ 105°CPackage / Case16-TSSOP
Processor SeriesHC08QCoreHC08
Data Bus Width8 bitData Ram Size128 B
Maximum Clock Frequency8 MHzNumber Of Programmable I/os14
Number Of Timers2Maximum Operating Temperature+ 105 C
Mounting StyleSMD/SMTDevelopment Tools By SupplierFSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature- 40 CLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Data Converters-
Connectivity-  
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3.5.2 Stop Mode
The ADC module is inactive after the execution of a STOP instruction. Any pending conversion is aborted.
ADC conversions resume when the MCU exits stop mode. Allow one conversion cycle to stabilize the
analog circuitry before using ADC data after exiting stop mode.
3.6 Input/Output Signals
The ADC module has four channels that are shared with I/O port A.
ADC voltage in (ADCVIN) is the input voltage signal from one of the four ADC channels to the ADC
module.
3.7 Input/Output Registers
These I/O registers control and monitor ADC operation:
ADC status and control register (ADSCR)
ADC data register (ADR)
ADC clock register (ADICLK)
3.7.1 ADC Status and Control Register
The following paragraphs describe the function of the ADC status and control register (ADSCR). When a
conversion is in process and the ADSCR is written, the current conversion data should be discarded to
prevent an incorrect reading.
Address: $003C
Bit 7
Read:
COCO
Write:
R
Reset:
0
R
Figure 3-3. ADC Status and Control Register (ADSCR)
COCO — Conversions Complete Bit
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
Freescale Semiconductor
6
5
4
3
AIEN
ADCO
CH4
CH3
0
0
1
1
= Reserved
NOTE
MC68HC908QY/QT Family Data Sheet, Rev. 6
Input/Output Signals
2
1
Bit 0
CH2
CH1
CH0
1
1
1
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