IC MCU 1.5K FLASH 16-TSSOP

MC68HC908QY1VDTE

Manufacturer Part NumberMC68HC908QY1VDTE
DescriptionIC MCU 1.5K FLASH 16-TSSOP
ManufacturerFreescale Semiconductor
SeriesHC08
MC68HC908QY1VDTE datasheet
 


Specifications of MC68HC908QY1VDTE

Core ProcessorHC08Core Size8-Bit
Speed8MHzPeripheralsLVD, POR, PWM
Number Of I /o13Program Memory Size1.5KB (1.5K x 8)
Program Memory TypeFLASHRam Size128 x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 VOscillator TypeInternal
Operating Temperature-40°C ~ 105°CPackage / Case16-TSSOP
Processor SeriesHC08QCoreHC08
Data Bus Width8 bitData Ram Size128 B
Maximum Clock Frequency8 MHzNumber Of Programmable I/os14
Number Of Timers2Maximum Operating Temperature+ 105 C
Mounting StyleSMD/SMTDevelopment Tools By SupplierFSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature- 40 CLead Free Status / RoHS StatusLead free / RoHS Compliant
Eeprom Size-Data Converters-
Connectivity-  
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Table 7-1. Instruction Set Summary (Sheet 6 of 6)
Source
Operation
Form
SWI
Software Interrupt
TAP
Transfer A to CCR
TAX
Transfer A to X
TPA
Transfer CCR to A
TST opr
TSTA
TSTX
Test for Negative or Zero
TST opr,X
TST ,X
TST opr,SP
TSX
Transfer SP to H:X
TXA
Transfer X to A
TXS
Transfer H:X to SP
WAIT
Enable Interrupts; Wait for Interrupt
A
Accumulator
C
Carry/borrow bit
CCR
Condition code register
dd
Direct address of operand
dd rr
Direct address of operand and relative offset of branch instruction
DD
Direct to direct addressing mode
DIR
Direct addressing mode
DIX+
Direct to indexed with post increment addressing mode
ee ff
High and low bytes of offset in indexed, 16-bit offset addressing
EXT
Extended addressing mode
ff
Offset byte in indexed, 8-bit offset addressing
H
Half-carry bit
H
Index register high byte
hh ll
High and low bytes of operand address in extended addressing
I
Interrupt mask
ii
Immediate operand byte
IMD
Immediate source to direct destination addressing mode
IMM
Immediate addressing mode
INH
Inherent addressing mode
IX
Indexed, no offset addressing mode
IX+
Indexed, no offset, post increment addressing mode
IX+D
Indexed with post increment to direct addressing mode
IX1
Indexed, 8-bit offset addressing mode
IX1+
Indexed, 8-bit offset, post increment addressing mode
IX2
Indexed, 16-bit offset addressing mode
M
Memory location
N
Negative bit
7.8 Opcode Map
See
Table
7-2.
Freescale Semiconductor
Description
PC ← (PC) + 1; Push (PCL)
SP ← (SP) – 1; Push (PCH)
SP ← (SP) – 1; Push (X)
SP ← (SP) – 1; Push (A)
SP ← (SP) – 1; Push (CCR)
SP ← (SP) – 1; I ← 1
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
CCR ← (A)
X ← (A)
A ← (CCR)
(A) – $00 or (X) – $00 or (M) – $00
H:X ← (SP) + 1
A ← (X)
(SP) ← (H:X) – 1
I bit ← 0; Inhibit CPU clocking
until interrupted
n
opr
PC
PCH Program counter high byte
PCL Program counter low byte
REL Relative addressing mode
rel
rr
SP1 Stack pointer, 8-bit offset addressing mode
SP2 Stack pointer 16-bit offset addressing mode
SP
U
V
X
Z
&
|
( )
–( )
#
«
?
:
MC68HC908QY/QT Family Data Sheet, Rev. 6
Opcode Map
Effect
on CCR
V H I N Z C
– – 1 – – – INH
83
INH
84
– – – – – – INH
97
– – – – – – INH
85
DIR
3D
INH
4D
INH
5D
0 – –
IX1
6D
IX
7D
SP1
9E6D
– – – – – – INH
95
– – – – – – INH
9F
– – – – – – INH
94
– – 0 – – – INH
8F
Any bit
Operand (one or two bytes)
Program counter
Relative program counter offset byte
Relative program counter offset byte
Stack pointer
Undefined
Overflow bit
Index register low byte
Zero bit
Logical AND
Logical OR
Logical EXCLUSIVE OR
Contents of
Negation (two’s complement)
Immediate value
Sign extend
Loaded with
If
Concatenated with
Set or cleared
Not affected
9
2
1
1
dd
3
1
1
ff
3
2
ff
4
2
1
2
1
71