R5F21334CNFP#U0 Renesas Electronics America, R5F21334CNFP#U0 Datasheet - Page 271

• Manufacturer Part Number: R5F21334CNFP#U0
• Description: MCU 1KB FLASH 16K ROM 32-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/33Cr

Specifications of R5F21334CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 27
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/33C Group
REJ09B0570-0100 Rev.1.00 Dec. 14, 2009
Page 241 of 589
19.2.5
Note:
Table 19.4
Notes:
Bit Symbol
After Reset
1. The writing results are as follows:
Bit
b0
b1
b2
b3
b4
b5
b6
b7
1. Edge selected by bits IOj1 to IOj0 (j = A, B, C, or D).
2. Includes the condition that bits BFC and BFD are set to 1 (buffer registers of registers TRCGRA and TRCGRB).
IMFA
IMFB
IMFC
IMFD
OVF
Address 0123h
•This bit is set to 0 when the read result is 1 and 0 is written to the same bit.
•This bit remains unchanged even if the read result is 0 and 0 is written to the same bit. (This bit remains 1 even
•This bit remains unchanged if 1 is written to it.
Symbol
if it is set to 1 from 0 after reading, and writing 0.)
Symbol
Bit
IMFC
IMFD
IMFA
IMFB
OVF
Timer RC Status Register (TRCSR)
—
—
—
TRCIOA pin input edge
TRCIOB pin input edge
TRCIOC pin input edge
TRCIOD pin input edge
When the TRC register overflows.
Source for Setting Bit of Each Flag to 1
OVF
Input capture Function
b7
0
Input capture / compare match flag A
Input capture / compare match flag B
Input capture / compare match flag C
Input capture / compare match flag D
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
Overflow flag
b6
—
1
Bit Name
Timer Mode
(1)
(1)
(1)
(1)
b5
—
1
When the values of the registers TRC and TRCGRA match.
When the values of the registers TRC and TRCGRB match.
When the values of the registers TRC and TRCGRC match.
When the values of the registers TRC and TRCGRD match.
Output Compare Function
b4
—
1
IMFD
[Source for setting this bit to 0]
Write 0 after read
[Source for setting this bit to 1]
Refer to Table 19.4 Source for Setting Bit of
Each Flag to 1.
[Source for setting this bit to 0]
Write 0 after read
[Source for setting this bit to 1]
Refer to Table 19.4 Source for Setting Bit of
Each Flag to 1.
b3
0
IMFC
b2
0
PWM Mode
(1)
(1)
Function
.
.
IMFB
b1
0
IMFA
b0
0
PWM2 Mode
(2)
(2)
19. Timer RC
R/W
R/W
R/W
R/W
R/W
R/W
—