MC68HC908RF2MFA Freescale Semiconductor, MC68HC908RF2MFA Datasheet - Page 118

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MC68HC908RF2MFA

Manufacturer Part Number
MC68HC908RF2MFA
Description
IC MCU 2K FLASH 4MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908RF2MFA

Core Processor
HC08
Core Size
8-Bit
Speed
4MHz
Peripherals
LVD, POR, PWM, RF Mod
Number Of I /o
12
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908RF2MFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
System Integration Module (SIM)
10.3.2.2 Computer Operating Properly (COP) Reset
10.3.2.3 Illegal Opcode Reset
10.3.2.4 Illegal Address Reset
10.3.2.5 Low-Voltage Inhibit (LVI) Reset
Data Sheet
118
CGMXCLK
CGMOUT
PORRST
OSC1
RST
IAB
The overflow of the COP counter causes an internal reset and sets the COP bit in
the SIM reset status register (SRSR) if the COPD bit in the CONFIG register is at 0.
(See
The SIM decodes signals from the CPU to detect illegal instructions. An illegal
instruction sets the ILOP bit in the SIM reset status register (SRSR) and causes a
reset.
If the stop enable bit, STOP, in the configuration register (CONFIG) is 0, the SIM
treats the STOP instruction as an illegal opcode and causes an illegal opcode
reset.
An opcode fetch from an unmapped address generates an illegal address reset.
The SIM verifies that the CPU is fetching an opcode prior to asserting the ILAD bit
in the SIM reset status register (SRSR) and resetting the MCU. A data fetch from
an unmapped address does not generate a reset.
The low-voltage inhibit module (LVI) asserts its output to the SIM when the V
voltage falls to the V
is set and a chip reset is asserted if the LVIPWRD and LVIRSTD bits in the
CONFIG register are at 0. The RST pin will be held low until the SIM counts 4096
CGMXCLK cycles after V
Section 4. Computer Operating Properly Module
CYCLES
Freescale Semiconductor, Inc.
4096
For More Information On This Product,
Figure 10-7. POR Recovery
System Integration Module (SIM)
CYCLES
Go to: www.freescale.com
32
LVR
voltage. The LVI bit in the SIM reset status register (SRSR)
DD
CYCLES
rises above V
32
LVR
+ H
LVR
$FFFE
. Another 64 CGMXCLK
MC68HC908RF2 — Rev. 4.0
(COP).)
$FFFF
MOTOROLA
DD

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