MC68HC908RF2MFA Freescale Semiconductor, MC68HC908RF2MFA Datasheet - Page 44

• Manufacturer Part Number: MC68HC908RF2MFA
• Description: IC MCU 2K FLASH 4MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908RF2MFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: LVD, POR, PWM, RF Mod
• Number Of I /o: 12
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

Configuration Register (CONFIG)
Data Sheet
44
NOTE:
LVISTOP — LVI Enable in Stop Mode Bit
LVIRST — LVI Reset Enable Bit
LVIPWR — LVI Power Enable Bit
COPRS — COP Rate Select Bit
SSREC — Short Stop Recovery Bit
Exiting stop mode by pulling reset will result in the long stop recovery.
If using the internal clock generator module or an external crystal oscillator, do not
set the SSREC bit.
The LVI has an enable time of t
and long stop recovery (both 4096 CGMXCLK cycles) gives a delay longer than the
LVI enable time for these startup scenarios. There is no period where the MCU is
not protected from a low-power condition. However, when using the short stop
recovery configuration option, the 32 CGMXCLK delay must be greater than the
LVI’s turn on time to avoid a period in startup where the LVI is not protecting the
MCU.
frequency higher (307.2 kHz–32 MHz) or lower (60 Hz–307.2 kHz) than the
base frequency of the internal oscillator. (See
Generator Module
When the LVIPWR bit is set, setting the LVISTOP bit enables the LVI to operate
during stop mode. Reset clears LVISTOP.
LVIRST enables the reset signal from the LVI module. (See
Low-Voltage Inhibit
LVIPWR disables the LVI module. (See
COPRS selects the COP timeout period. Reset clears COPRS. (See
Computer Operating Properly Module
SSREC enables the CPU to exit stop mode with a delay of 32 CGMXCLK cycles
instead of a 4096-CGMXCLK cycle delay.
1 = ICG set for slow external crystal operation
0 = ICG set for fast external crystal operation
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
1 = LVI module resets enabled
0 = LVI module resets disabled
1 = LVI module power enabled
0 = LVI module power disabled
1 = COP timeout period = 2
0 = COP timeout period = 2
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLK cycles
Freescale Semiconductor, Inc.
For More Information On This Product,
Configuration Register (CONFIG)
Go to: www.freescale.com
(ICG).)
(LVI).)
EN
. The system stabilization time for power-on reset
13
18
– 2
– 2
4
4
CGMXCLK cycles
CGMXCLK cycles
Section 8. Low-Voltage Inhibit
(COP).)
Section 6. Internal Clock
MC68HC908RF2 — Rev. 4.0
Section 8.
Section 4.
MOTOROLA
(LVI).)