MC68HC908RF2MFA Freescale Semiconductor, MC68HC908RF2MFA Datasheet - Page 32

• Manufacturer Part Number: MC68HC908RF2MFA
• Description: IC MCU 2K FLASH 4MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908RF2MFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: LVD, POR, PWM, RF Mod
• Number Of I /o: 12
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

Memory
2.5.4 FLASH 2TS Program/Margin Read Operation
Data Sheet
32
NOTE:
NOTE:
After a total of eight program operations have been applied to a row, the row must
be erased before further programming to avoid program disturb. An erased byte
will read $00.
The FLASH 2TS memory is programmed on a page basis. A page consists of one
byte. The smart programming algorithm
every page in the FLASH 2TS memory.
The embedded smart programming algorithm uses this step-by-step sequence to
program the data into the FLASH memory. The algorithm optimizes the time
required to program each page. Refer to
Routines
While these operations must be performed in the order shown, other unrelated
operations may occur between the steps.
The smart programming algorithm guarantees the minimum possible program
time.
10. Wait for a time, t
11. Set PGM = 0.
12. Wait for a time, t
13. Read back data in margin read mode. This read operation is stretched by
14. Clear the MARGIN bit. If the margin read data is identical to
1. Set the FDIV bits. These bits determine the charge pump frequency.
2. Set PGM = 1. This configures the memory for program operation and
3. Read the FLASH 2TS block protect register (FLBPR).
4. Write data to the one byte being programmed.
5. Set HVEN = 1.
6. Wait for a time, t
7. Set HVEN = 0.
8. Wait for a time, t
9. Set MARGIN = 1.
enables the latching of address and data for programming.
eight cycles.
write data, the program operation is complete; otherwise, jump to step 2.
Freescale Semiconductor, Inc.
For More Information On This Product,
for information on utilizing embedded routines.
Go to: www.freescale.com
Step
HVTV
VTP
HVD
Memory
.
.
.
.
(Figure
2.5.7 Embedded Program/Erase
2-4) is recommended to program
MC68HC908RF2 — Rev. 4.0
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