MC68HC908RF2MFA Freescale Semiconductor, MC68HC908RF2MFA Datasheet - Page 38

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MC68HC908RF2MFA

Manufacturer Part Number
MC68HC908RF2MFA
Description
IC MCU 2K FLASH 4MHZ 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908RF2MFA

Core Processor
HC08
Core Size
8-Bit
Speed
4MHz
Peripherals
LVD, POR, PWM, RF Mod
Number Of I /o
12
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908RF2MFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Memory
2.5.8.4 REDPROG Routine
Data Sheet
38
Entry conditions:
Exit conditions:
Purpose:
Name:
This routine erases the block of FLASH defined by H:X and CTLBYTE. The
algorithm defined in
Preserves the contents of H:X (address passed)
REDPROG
This routine will use a range of multiple rows in the FLASH array to emulate
increased write/erase cycling capability of one row.
H:X
LADDR
DATA
BUMPS
CPUSPD
DERASE
I bit
This routine uses a range of the FLASH array containing multiple rows to emulate
increased write/erase cycling capability for data storage. The routine will write data
to each row of the FLASH array (in the range defined) upon subsequent calls. The
number of rows is the difference between the value in H:X and LADDR, divided
by 8.
A row is the minimum range that can be programmed with the REDPROG routine.
All rows in the range will be programmed once before any are programmed again.
This approach is taken to ensure that all rows reach the end of lifetime at
approximately the same time.
A special bit will be maintained by the routine, called a cycling bit, in each row. This
bit is used to ensure that the data is programmed to all the rows defined in the
range. This is the high bit of the first byte in each row. This bit cannot be used to
store user data. It will be modified by the REDPROG routine. This is at bit 7 of the
byte at address DATA+0.
To determine which row to program, the algorithm will step from the first to the last
row in a range looking for the first row whose cycling bit is different from the first. If
all rows contain the same cycling bit, then the first row will be used.
C bit
Freescale Semiconductor, Inc.
For More Information On This Product,
Contains the address of the first row in the range. This address must
be the first address of a row (multiple of eight bytes)
Address of last row in the range; must be the first address of a row
(multiple of eight bytes)
Data to program in the row (bit 7 of DATA + 0 is used internally and
will be overwritten). Routine will always use 8 bytes starting at DATA
Contains the maximum allowable number of programming bumps to
use
Contains the bus frequency times 4 in MHz
Contains the erase delay time in
Set if successful program; cleared otherwise
Set, masking interrupts
Go to: www.freescale.com
2.5.3 FLASH 2TS Erase Operation
Memory
µ
s/24
is used.
MC68HC908RF2 — Rev. 4.0
MOTOROLA

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