MC68HC908RF2MFA Freescale Semiconductor, MC68HC908RF2MFA Datasheet - Page 80

• Manufacturer Part Number: MC68HC908RF2MFA
• Description: IC MCU 2K FLASH 4MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908RF2MFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: LVD, POR, PWM, RF Mod
• Number Of I /o: 12
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

Internal Clock Generator Module (ICG)
6.4.5 Switching Internal Clock Frequencies
Data Sheet
80
NOTE:
Likewise, when DSTG[4:0] is %11111, the ring operates at 25 stage delays for 31
of 32 cycles and at 23 stage delays for one of 32 cycles. When DSTG[7:5] is %111,
similar results are achieved by including a variable divide-by-two, so the ring
operates at 31 stages for some cycles and at 17 stage delays, with a divide-by-two
for an effective 34 stage delays, for the remainder of the cycles. Adjusting the
DSTG[0] bit has a 0.202 percent to 0.368 percent effect on the output clock period.
This corresponds to the minimum size correction made by the DLF, and the
inherent, long-term quantization error in the output frequency.
The frequency of the internal clock (ICLK) may need to be changed for some
applications. For example, if the reset condition does not provide the correct
frequency, or if the clock is slowed down for a low-power mode (or sped up after a
low-power mode), the frequency must be changed by programming the internal
clock multiplier factor (N). The frequency of ICLK is N times the frequency of
IBASE, which is 307.2 kHz ±25 percent.
Before switching frequencies by changing the N value, the clock monitor must be
disabled. This is because when N is changed, the frequency of the low-frequency
base clock (IBASE) will change proportionally until the digital loop filter has
corrected the error. Since the clock monitor uses IBASE, it could erroneously
detect an inactive clock. The clock monitor cannot be re-enabled until the internal
clock is stable again (ICGS is set).
There is no hardware mechanism to prevent changing bus frequency dynamically.
Be careful when changing bus frequency and consider the impact on the system.
This flow is an example of how to change the clock frequency:
1. Verify there is no clock monitor interrupt by reading the CMF bit.
2. Turn off the clock monitor.
3. If desired, switch to the external clock (see
4. Change the value of N.
5. Switch back to internal (see
6. Turn on the clock monitor (see
Sources).
if desired.
Freescale Semiconductor, Inc.
For More Information On This Product,
Internal Clock Generator Module (ICG)
Go to: www.freescale.com
6.4.1 Switching Clock
6.4.2 Enabling the Clock
6.4.1 Switching Clock
MC68HC908RF2 — Rev. 4.0
Sources), if desired.
Monitor),
MOTOROLA