MC68HC705C8ACFNE Freescale Semiconductor, MC68HC705C8ACFNE Datasheet - Page 159

• Manufacturer Part Number: MC68HC705C8ACFNE
• Description: IC MCU 8K 2.1MHZ OTP 44-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C8ACFNE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: OTP
• Ram Size: 304 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• A/d Inputs: 4-Channel, 8-Bit
• Eeprom Memory: 0 Bytes
• Input Output: 24
• Interface: SCI/SPI
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 44-pin PLCC
• Programmable Memory: 8K Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Processor Series: HC705C
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 304 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: RoHS Compliant part

12.4.2 Read-Modify-Write Instructions
MC68HC705C8A — Rev. 3
MOTOROLA
NOTE:
These instructions read a memory location or a register, modify its
contents, and write the modified value back to the memory location or to
the register.
Do not use read-modify-write operations on write-only registers.
Freescale Semiconductor, Inc.
For More Information On This Product,
Arithmetic shift left (same as LSL)
Arithmetic shift right
Bit clear
Bit set
Clear register
Complement (one’s complement)
Decrement
Increment
Logical shift left (same as ASL)
Logical shift right
Negate (two’s complement)
Rotate left through carry bit
Rotate right through carry bit
Test for negative or zero
1. Unlike other read-modify-write instructions, BCLR and BSET use
2. TST is an exception to the read-modify-write sequence because it
only direct addressing.
does not write a replacement value.
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Table 12-2. Read-Modify-Write Instructions
Instruction Set
Instruction
Mnemonic
BCLR
BSET
TST
COM
ROR
DEC
NEG
ASR
CLR
LSR
ROL
ASL
INC
LSL
(2)
Instruction Types
(1)
(1)
Technical Data
Instruction Set