MC68HC705C8ACFNE Freescale Semiconductor, MC68HC705C8ACFNE Datasheet - Page 66

• Manufacturer Part Number: MC68HC705C8ACFNE
• Description: IC MCU 8K 2.1MHZ OTP 44-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C8ACFNE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: OTP
• Ram Size: 304 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• A/d Inputs: 4-Channel, 8-Bit
• Eeprom Memory: 0 Bytes
• Input Output: 24
• Interface: SCI/SPI
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 44-pin PLCC
• Programmable Memory: 8K Bytes
• Timers: 3-16-bit
• Voltage, Range: 3-5.5 V
• Processor Series: HC705C
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 304 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: RoHS Compliant part

Resets
5.3.3.2 Non-Programmable COP Watchdog
Technical Data
66
CM1:CM0
00
01
10
11
NOTE:
Timeout Rate
f
f
f
f
OP
OP
OP
OP
Table 5-1. Programmable COP Timeout Period Selection
COP
2
2
2
2
15
17
19
21
A timeout of the 18-stage ripple counter in the non-programmable COP
watchdog generates a reset. The timeout period is 65.536 ms when
f
is a direct function of the crystal frequency. The equation is:
Two memory locations control operation of the non-programmable COP
watchdog:
Writing a logic 1 to the programmable COP enable bit (PCOPE) in the
COP control register enables the programmable COP watchdog. Setting
the PCOPE bit while the NCOPE bit is programmed to logic 1 enables
both COP watchdogs to operate at the same time.
OSC
1. Non-programmable COP enable bit (NCOPE) in mask option
Freescale Semiconductor, Inc.
f
For More Information On This Product,
= 4 MHz. The timeout period for the non-programmable COP timer
f
OSC
OP
register 2 (MOR2)
Programming the NCOPE bit in MOR2 to a logic 1 enables the
non-programmable COP watchdog. See
Register
262.14 ms
16.38 ms
65.54 ms
1.048 s
= 2.0 MHz
= 4.0 MHz
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2.
Resets
f
Programmable COP Timeout Period
f
OSC
OP
Timeout period =
292.95 ms
= 1.7897 MHz
18.31 ms
73.24 ms
= 3.5795 MHz
1.172 s
f
262,144
f
OSC
OP
f
131.07 ms
524.29 ms
32.77 ms
OSC
2.097 s
= 1.0 MHz
= 2.0 MHz
9.5.3 Mask Option
MC68HC705C8A — Rev. 3
f
f
OSC
OP
262.14 ms
65.54 ms
1.048 s
4.194 s
= 0.5 MHz
= 1.0 MHz