MC68HC705C8ACFNE Freescale Semiconductor, MC68HC705C8ACFNE Datasheet - Page 57

IC MCU 8K 2.1MHZ OTP 44-PLCC

MC68HC705C8ACFNE

Manufacturer Part Number
MC68HC705C8ACFNE
Description
IC MCU 8K 2.1MHZ OTP 44-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC68HC705C8ACFNE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
304 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
A/d Inputs
4-Channel, 8-Bit
Eeprom Memory
0 Bytes
Input Output
24
Interface
SCI/SPI
Memory Type
OTP
Number Of Bits
8
Package Type
44-pin PLCC
Programmable Memory
8K Bytes
Timers
3-16-bit
Voltage, Range
3-5.5 V
Processor Series
HC705C
Core
HC05
Data Bus Width
8 bit
Data Ram Size
304 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2.1 MHz
Number Of Programmable I/os
24
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
RoHS Compliant part

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4.4 Interrupt Processing
MC68HC705C8A — Rev. 3
MOTOROLA
The CPU takes these actions to begin servicing an interrupt:
The return-from-interrupt (RTI) instruction causes the CPU to recover
the CPU registers from the stack as shown in
Function
interrupts
interrupts
interrupts
Software
interrupt
External
interrupt
1. Stores the CPU registers on the stack in the order shown in
2. Sets the I bit in the CCR to prevent further interrupts
3. Loads the program counter with the contents of the appropriate
Freescale Semiconductor, Inc.
Reset
(SWI)
Timer
SCI
SPI
For More Information On This Product,
Figure 4-4
interrupt vector locations as shown in
RESET pin
Port B pins
Table 4-1. Reset/Interrupt Vector Addresses
User code
Go to: www.freescale.com
Power-on
MODF bit
RDRF bit
TDRE bit
IDLE bit
SPIF bit
Source
IRQ pin
OCF bit
TOF bit
ICF bit
OR bit
TC bit
logic
Interrupts
OCIE bit
TOIE bit
TCIE bit
ICIE bit
ILIE bit
RIE bit
Local
Mask
None
None
None
SPIE
Global
Mask
None
None
I bit
I bit
I bit
I bit
(1 = Highest)
Same priority
instruction
Table
Priority
as any
Figure
1
2
3
4
5
4-1.
4-4.
Interrupt Processing
Vector Address
$1FFC–$1FFD
$1FFE–$1FFF
$1FFA–$1FFB
$1FF8–$1FF9
$1FF6–$1FF7
$1FF4–$1FF5
Technical Data
Interrupts

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