PIC18LF6310T-I/PT Microchip Technology, PIC18LF6310T-I/PT Datasheet - Page 132

• Manufacturer Part Number: PIC18LF6310T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6310T-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6310/6410/8310/8410
TABLE 11-5:
DS39635C-page 132
RC0/T1OSO/T13CKI
RC1/T1OSI/CCP2
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX1/CK1
RC7/RX1/DT1
Legend:
Note 1:
Pin Name
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Default assignment for CCP2 when CCP2MX Configuration bit is set.
PORTC FUNCTIONS
Function
CCP2
T1OSO
T13CKI
T1OSI
CCP1
SDO
RC0
RC1
RC2
RC3
SCK
SCL
RC4
SDA
RC5
RC6
CK1
RC7
RX1
TX1
DT1
SDI
(1)
Setting
TRIS
0
1
x
1
0
1
x
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
0
1
0
0
1
1
1
1
0
1
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
LATC<0> data output.
PORTC<0> data input.
Timer1 oscillator output; enabled when Timer1 oscillator is enabled.
Disables digital I/O.
Timer1/Timer3 counter input.
LATC<1> data output.
PORTC<1> data input.
Timer1 oscillator input; enabled when Timer1 oscillator is enabled.
Disables digital I/O.
CCP2 compare output and CCP2 PWM output; takes priority over port
data.
CCP2 capture input
LATC<2> data output.
PORTC<2> data input.
CCP1 compare output and CCP1 PWM output; takes priority over port
data.
CCP1 capture input.
LATC<3> data output.
PORTC<3> data input.
SPI clock output (MSSP module); takes priority over port data.
SPI clock input (MSSP module).
I
I
LATC<4> data output.
PORTC<4> data input.
SPI data input (MSSP module).
I
I
LATC<5> data output.
PORTC<5> data input.
SPI data output (MSSP module); takes priority over port data.
LATC<6> data output.
PORTC<6> data input.
Synchronous serial data output (EUSART module); takes priority over
port data.
Synchronous serial data input (EUSART module). User must
configure as an input.
Synchronous serial clock input (EUSART module).
LATC<7> data output.
PORTC<7> data input.
Asynchronous serial receive data input (EUSART module)
Synchronous serial data output (EUSART module); takes priority over
port data.
Synchronous serial data input (EUSART module). User must
configure as an input.
2
2
2
2
C™ clock output (MSSP module); takes priority over port data.
C clock input (MSSP module); input type depends on module setting.
C data output (MSSP module); takes priority over port data.
C data input (MSSP module); input type depends on module setting.
Description
 2010 Microchip Technology Inc.