PIC18LF6310T-I/PT Microchip Technology, PIC18LF6310T-I/PT Datasheet - Page 158

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC

PIC18LF6310T-I/PT

Manufacturer Part Number
PIC18LF6310T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets

Specifications of PIC18LF6310T-I/PT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF6310T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6310/6410/8310/8410
13.3.3
The Timer1 oscillator circuit draws very little power
during operation. Due to the low-power nature of the
oscillator, it may also be sensitive to rapidly changing
signals in close proximity.
The oscillator circuit, shown in
located as close as possible to the microcontroller.
There should be no circuits passing within the oscillator
circuit boundaries other than V
If a high-speed circuit must be located near the oscilla-
tor (such as the CCP1 pin in Output Compare or PWM
mode, or the primary oscillator using the OSC2 pin), a
grounded guard ring around the oscillator circuit may
be helpful when used on a single sided PCB, or in
addition to a ground plane.
13.4
The TMR1 register pair (TMR1H:TMR1L) increments
from 0000h to FFFFh and rolls over to 0000h. The
Timer1 interrupt, if enabled, is generated on overflow,
which is latched in interrupt flag bit, TMR1IF
(PIR1<0>). This interrupt can be enabled or disabled
by setting or clearing the Timer1 Interrupt Enable bit,
TMR1IE (PIE1<0>).
13.5
If CCP1 or CCP2 is configured in Compare mode to
generate a Special Event Trigger (CCP1M<3:0> or
CCP2M<3:0> = 1011), this signal will reset Timer1.
The trigger from CCP2 will also start an A/D conversion
if the A/D module is enabled (see
“Special Event Triggers”
The module must be configured as either a timer or a
synchronous counter to take advantage of this feature.
When used this way, the CCPRH:CCPRL register pair
effectively becomes a period register for Timer1.
If Timer1 is running in Asynchronous Counter ‘mode,
this Reset operation may not work.
In the event that a write to Timer1 coincides with a
Special Event Trigger, the write operation will take
precedence.
DS39635C-page 158
Note:
Timer1 Interrupt
Resetting Timer1 Using the CCP
Special Event Trigger
TIMER1 OSCILLATOR LAYOUT
CONSIDERATIONS
The special event triggers from the CCP2
module will not set the TMR1IF interrupt
flag bit (PIR1<0>).
for more information.).
SS
Figure
or V
DD
13-3, should be
Section 16.3.4
.
13.6
Adding an external LP oscillator to Timer1 (such as the
one described in
above), gives users the option to include RTC function-
ality to their applications. This is accomplished with an
inexpensive watch crystal to provide an accurate time
base and several lines of application code to calculate
the time. When operating in Sleep mode and using a
battery or supercapacitor as a power source, it can
completely eliminate the need for a separate RTC
device and battery backup.
The application code routine, RTCisr, shown in
Example
increment a counter at one-second intervals using an
Interrupt Service Routine. Incrementing the TMR1 reg-
ister pair to overflow triggers the interrupt and calls the
routine, which increments the seconds counter by one;
additional counters for minutes and hours are
incremented as the previous counter overflow.
Since the register pair is 16 bits wide, counting up to
overflow the register directly from a 32.768 kHz clock
would take 2 seconds. To force the overflow at the
required one-second intervals, it is necessary to
preload it; the simplest method is to set the Most Sig-
nificant bit of TMR1H with a BSF instruction. Note that
the TMR1L register is never preloaded or altered; doing
so may introduce cumulative error over many cycles.
For this method to be accurate, Timer1 must operate in
Asynchronous mode and the Timer1 overflow interrupt
must be enabled (PIE1<0> = 1), as shown in the
routine RTCinit. The Timer1 oscillator must also be
enabled and running at all times.
Using Timer1 as a
Real-Time Clock
13-1, demonstrates a simple method to
Section 13.3 “Timer1
 2010 Microchip Technology Inc.
Oscillator”,

Related parts for PIC18LF6310T-I/PT