PIC18LF6310T-I/PT Microchip Technology, PIC18LF6310T-I/PT Datasheet - Page 26

• Manufacturer Part Number: PIC18LF6310T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6310T-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6310/6410/8310/8410
TABLE 1-3:
DS39635C-page 26
RD0/AD0/PSP0
RD1/AD1/PSP1
RD2/AD2/PSP2
RD3/AD3/PSP3
RD4/AD4/PSP4
RD5/AD5/PSP5
RD6/AD6/PSP6
RD7/AD7/PSP7
Legend: TTL = TTL compatible input
Note 1:
RD0
AD0
PSP0
RD1
AD1
PSP1
RD2
AD2
PSP2
RD3
AD3
PSP3
RD4
AD4
PSP4
RD5
AD5
PSP5
RD6
AD6
PSP6
RD7
AD7
PSP7
2:
3:
Pin Name
ST = Schmitt Trigger input with CMOS levels
I
P
Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared (all operating modes except
Microcontroller mode).
Default assignment for CCP2 in all operating modes (CCP2MX is set).
Alternate assignment for CCP2 when CCP2MX is cleared (Microcontroller mode only).
= Input
= Power
PIC18F8310/8410 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
TQFP
72
69
68
67
66
65
64
63
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
PORTD is a bidirectional I/O port.
Digital I/O.
External Memory Address/Data 0.
Parallel Slave Port data.
Digital I/O.
External Memory Address/Data 1.
Parallel Slave Port data.
Digital I/O.
External Memory Address/Data 2.
Parallel Slave Port data.
Digital I/O.
External Memory Address/Data 3.
Parallel Slave Port data.
Digital I/O.
External Memory Address/Data 4.
Parallel Slave Port data.
Digital I/O.
External Memory Address/Data 5.
Parallel Slave Port data.
Digital I/O.
External Memory Address/Data 6.
Parallel Slave Port data.
Digital I/O.
External Memory Address/Data 7.
Parallel Slave Port data.
CMOS = CMOS compatible input or output
Analog = Analog input
O
I
2
C = ST with I
= Output
2
C™ or SMB levels
Description
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