PIC18LF6310T-I/PT Microchip Technology, PIC18LF6310T-I/PT Datasheet - Page 156

• Manufacturer Part Number: PIC18LF6310T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6310T-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6310/6410/8310/8410
13.1
Timer1 can operate in one of these modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>). When TMR1CS is cleared
(= 0), Timer1 increments on every internal instruction
FIGURE 13-1:
FIGURE 13-2:
DS39635C-page 156
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
T1OSO/T13CKI
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Timer1 Operation
T1OSI
T1OSI
Timer1 Oscillator
Timer1 Oscillator
TIMER1 BLOCK DIAGRAM
TIMER1 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
T1OSCEN
T1CKPS<1:0>
T1SYNC
TMR1ON
T1OSCEN
T1CKPS<1:0>
T1SYNC
TMR1ON
(1)
(1)
TMR1CS
TMR1CS
(CCP Special Event Trigger)
(CCP Special Event Trigger)
Clear TMR1
Clear TMR1
Internal
Clock
F
Clock
Internal
F
OSC
OSC
/4
/4
On/Off
1
0
1
0
Prescaler
Prescaler
1, 2, 4, 8
1, 2, 4, 8
cycle (F
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
When Timer1 is enabled, the RC1/T1OSI and RC0/
T1OSO/T13CKI pins become inputs. This means the
values of TRISC<1:0> are ignored and the pins are
read as ‘0’.
2
2
OSC
TMR1L
TMR1L
/4). When the bit is set, Timer1 increments
8
Sleep Input
Sleep Input
Synchronize
8
Synchronize
Detect
Detect
High Byte
High Byte
TMR1H
TMR1
TMR1
8
 2010 Microchip Technology Inc.
8
8
Internal Data Bus
1
0
1
0
Read TMR1L
Write TMR1L
on Overflow
on Overflow
TMR1IF
TMR1IF
Set
Set
Timer1
On/Off
Timer1
On/Off