PIC18LF6310T-I/PT Microchip Technology, PIC18LF6310T-I/PT Datasheet - Page 281

• Manufacturer Part Number: PIC18LF6310T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6310T-I/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.0
PIC18F6310/6410/8310/8410 devices include several
features intended to maximize reliability and minimize
cost through elimination of external components.
These are:
• Oscillator Selection
• Resets:
• Interrupts
• Watchdog Timer (WDT)
• Fail-Safe Clock Monitor
• Two-Speed Start-up
• Code Protection
• ID Locations
• In-Circuit Serial Programming (ICSP)
The oscillator can be configured for the application
depending on frequency, power, accuracy and cost. All
of the options are discussed in detail in
“Oscillator
TABLE 24-1:
 2010 Microchip Technology Inc.
300001h
300002h
300003h
300004h
300005h
300006h
300008h
30000Ch
3FFFFEh DEVID1
3FFFFFh
Legend:
Note 1:
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
2:
File Name
SPECIAL FEATURES OF THE
CPU
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3L
CONFIG3H
CONFIG4L
CONFIG5L
CONFIG7L
DEVID2
x = unknown, u = unchanged, - = unimplemented, q = value depends on individual device.
Shaded cells are unimplemented, read as ‘0’.
Unimplemented in PIC18F6310/6410 devices; maintain this bit set.
See
Configurations”.
Register 24-9
CONFIGURATION BITS AND DEVICE IDs
(1)
MCLRE
DEBUG
DEV10
DEV2
IESO
WAIT
Bit 7
—
—
—
—
for DEVID1 values. DEVID registers are read-only and cannot be programmed by the user.
FCMEN
XINST
DEV1
DEV9
Bit 6
BW
—
—
—
—
—
Section 3.0
DEV0
DEV8
Bit 5
PIC18F6310/6410/8310/8410
—
—
—
—
—
—
—
—
WDTPS3 WDTPS2 WDTPS1 WDTPS0
BORV1
REV4
DEV7
Bit 4
—
—
—
—
—
—
FOSC3
BORV0
A complete discussion of device Resets and interrupts
is available in previous sections of this data sheet.
In addition to their Power-up and Oscillator Start-up Tim-
ers provided for Resets, PIC18F6310/6410/8310/8410
devices have a Watchdog Timer, which is either
permanently enabled via the Configuration bits, or
software controlled (if configured as disabled).
The inclusion of an internal RC oscillator also provides
the additional benefits of a Fail-Safe Clock Monitor
(FSCM) and Two-Speed Start-up. FSCM provides for
background monitoring of the peripheral clock and
automatic switchover in the event of its failure.
Two-Speed Start-up enables code to be executed
almost immediately on start-up, while the primary clock
source completes its start-up delays.
All of these features are enabled and configured by
setting the appropriate Configuration register bits.
24.1
The Configuration bits can be programmed (read as
‘0’) or left unprogrammed (read as ‘1’), to select various
device configurations. These bits are mapped, starting
at program memory location, 300000h.
The user will note that address, 300000h, is beyond the
user program memory space. In fact, it belongs to the
configuration memory space (300000h-3FFFFFh),
which can only be accessed using table reads.
REV3
DEV6
Bit 3
—
—
—
—
—
LPT1OSC
BOREN1 BOREN0 PWRTEN
Configuration Bits
FOSC2
REV2
DEV5
Bit 2
—
—
—
—
FOSC1
REV1
DEV4
Bit 1
PM1
—
—
—
—
CCP2MX
STVREN
WDTEN
FOSC0
EBTR
REV0
DEV3
Bit 0
PM0
CP
DS39635C-page 281
Unprogrammed
00-- 0111
---1 1111
---1 1111
11-- --11
1--- -0-1
10-- ---1
---- ---1
---- ---1
11qx xxxx
0000 qq1q
Default/
Value
(2)
(2)