PIC18LF6310T-I/PT Microchip Technology, PIC18LF6310T-I/PT Datasheet - Page 400

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC

PIC18LF6310T-I/PT

Manufacturer Part Number
PIC18LF6310T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets

Specifications of PIC18LF6310T-I/PT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF6310T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6310/6410/8310/8410
BN .................................................................................... 306
BNC .................................................................................. 307
BNN .................................................................................. 307
BNOV ............................................................................... 308
BNZ .................................................................................. 308
BOR. See Brown-out Reset.
BOV .................................................................................. 311
BRA .................................................................................. 309
Break Character (12-Bit) Transmit and Receive .............. 234
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ............................................. 58, 281
BSF .................................................................................. 309
BTFSC ............................................................................. 310
BTFSS .............................................................................. 310
BTG .................................................................................. 311
BZ ..................................................................................... 312
C
C Compilers
CALL ................................................................................ 312
Capture (CCP Module) ..................................................... 169
Capture/Compare/PWM (CCP) ........................................ 167
CLRF ................................................................................ 313
CLRWDT .......................................................................... 313
Code Examples
DS39635C-page 400
RCIO Oscillator Mode ................................................ 37
Reads From Program Memory .................................. 91
Single Comparator ................................................... 267
Table Read and Table Write Operations ................... 89
Timer0 in 16-Bit Mode .............................................. 152
Timer0 in 8-Bit Mode ................................................ 152
Timer1 ...................................................................... 156
Timer1 (16-Bit Read/Write Mode) ............................ 156
Timer2 ...................................................................... 162
Timer3 ...................................................................... 164
Timer3 (16-Bit Read/Write Mode) ............................ 164
Watchdog Timer ....................................................... 290
Detecting .................................................................... 58
Disabling in Sleep Mode ............................................ 58
Software Enabled ....................................................... 58
MPLAB C18 ............................................................. 348
Associated Registers ............................................... 172
CCP Pin Configuration ............................................. 169
CCPR2H:CCPR2L Registers ................................... 169
Software Interrupt .................................................... 170
Timer1/Timer3 Mode Selection ................................ 169
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 168
CCPRxH Register .................................................... 168
CCPRxL Register ..................................................... 168
Compare Mode. See Compare.
Interconnect Configurations ..................................... 168
Module Configuration ............................................... 168
16 x 16 Signed Multiply Routine .............................. 108
16 x 16 Unsigned Multiply Routine .......................... 108
8 x 8 Signed Multiply Routine .................................. 107
8 x 8 Unsigned Multiply Routine .............................. 107
Changing Between Capture Prescalers ................... 170
Computed GOTO Using an Offset Value ................... 72
Executing Back to Back Sleep Instructions ................ 46
Fast Register Stack .................................................... 72
How to Clear RAM (Bank 1) Using Indirect
Implementing a Real-Time Clock Using a
Initializing PORTA .................................................... 125
Addressing ......................................................... 84
Timer1 Interrupt Service .................................. 159
Code Protection ............................................................... 281
COMF .............................................................................. 314
Comparator ...................................................................... 265
Comparator Specifications ............................................... 366
Comparator Voltage Reference ....................................... 271
Compare (CCP Module) .................................................. 170
Computed GOTO ............................................................... 72
CONFIG2L (Configuration 2 Low) ................................... 283
Configuration Bits ............................................................ 281
Configuration Register Protection .................................... 295
Conversion Considerations .............................................. 396
CPFSEQ .......................................................................... 314
CPFSGT .......................................................................... 315
CPFSLT ........................................................................... 315
Crystal Oscillator/Ceramic Resonator ................................ 35
Customer Change Notification Service ............................ 409
Customer Notification Service ......................................... 409
Customer Support ............................................................ 409
D
Data Addressing Modes .................................................... 84
Initializing PORTB .................................................... 128
Initializing PORTC ................................................... 131
Initializing PORTD ................................................... 134
Initializing PORTE .................................................... 137
Initializing PORTF .................................................... 140
Initializing PORTG ................................................... 142
Initializing PORTH ................................................... 144
Initializing PORTJ .................................................... 146
Loading the SSPBUF (SSPSR) Register ................. 180
Reading a Flash Program Memory Word .................. 91
Saving STATUS, WREG and BSR
Analog Input Connection Considerations ................ 269
Associated Registers ............................................... 269
Configuration ........................................................... 266
Effects of a Reset .................................................... 268
Interrupts ................................................................. 268
Operation ................................................................. 267
Operation During Sleep ........................................... 268
Outputs .................................................................... 267
Reference ................................................................ 267
Response Time ........................................................ 267
Accuracy and Error .................................................. 272
Associated Registers ............................................... 273
Configuring .............................................................. 271
Connection Considerations ...................................... 272
Effects of a Reset .................................................... 272
Operation During Sleep ........................................... 272
Associated Registers ............................................... 172
CCP Pin Configuration ............................................. 170
CCPR2 Register ...................................................... 170
Software Interrupt Mode .......................................... 170
Special Event Trigger .............................. 165, 170, 264
Timer1/Timer3 Mode Selection ................................ 170
Comparing Addressing Modes with the
Direct ......................................................................... 84
Indexed Literal Offset ................................................ 86
Indirect ....................................................................... 84
Inherent and Literal .................................................... 84
Registers in RAM ............................................. 124
External Signal ................................................ 267
Internal Signal .................................................. 267
Extended Instruction Set Enabled ..................... 87
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