MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 398

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

DMA Timers (DTIM0–DTIM3)
21-6
Field
REF
CAP
7–2
1
0
IPSBAR
Offset:
Reset:
Reserved, must be cleared.
Output reference event. The counter value (DTCNn) equals DTRRn. Writing a 1 to REF clears the event condition.
Writing a 0 has no effect.
Capture event. The counter value has been latched into DTCRn. Writing a 1 to CAP clears the event condition.
Writing a 0 has no effect.
W
R
0x00_0403 (DTER0)
0x00_0443 (DTER1)
0x00_0483 (DTER2)
0x00_04C3 (DTER3)
0
0
7
CAP
0
1
1
1
1
1
1
1
1
REF
0
0
6
0
1
1
1
1
DTMRn[CE]
Table 21-4. DTERn Field Descriptions
XX
00
00
01
01
10
10
11
11
DTMRn[ORRI]
Figure 21-4. DTERn Registers
0
0
5
X
0
0
1
1
[DMAEN]
DTXMRn
X
0
1
0
1
0
1
0
1
DTXMRn[DMAEN]
0
0
4
Description
Capture on falling edge and trigger interrupt
Capture on rising edge and trigger interrupt
Capture on any edge and trigger interrupt
Capture on falling edge and trigger DMA
Capture on rising edge and trigger DMA
Capture on any edge and trigger DMA
X
0
1
0
1
Disable capture event output
Disable capture event output
0
0
3
Interrupt request asserted
No event
DMA request asserted
No request asserted
No request asserted
0
0
2
No event
Access: User read/write
REF
w1c
Freescale Semiconductor
1
0
CAP
w1c
0
0