MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 631
MCF5282CVM66
Manufacturer Part Number
MCF5282CVM66
Description
Manufacturer
Freescale
Datasheet
1.MCF5282CVM66.pdf
(766 pages)
Specifications of MCF5282CVM66
Cpu Family
MCF528x
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Interface Type
CAN/I2C/QSPI/UART
Total Internal Ram Size
64KB
# I/os (max)
150
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
3.3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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Table 30-9
Table 30-10
The DBR supports both aligned and misaligned references.
processor address, access size, and location within the 32-bit data bus.
30.4.6
The PBR defines an instruction address for use as part of the trigger. This register’s contents are compared
with the processor’s program counter register when TDR is configured appropriately. PBR bits are masked
by setting corresponding PBMR bits. Results are compared with the processor’s program counter register,
as defined in TDR.
Freescale Semiconductor
31–0
31–0
Bits
Bits
describes DBR fields.
Name
Name
Program Counter Breakpoint/Mask Registers (PBR, PBMR)
Mask
Data
describes DBMR fields.
Data breakpoint value. Contains the value to be compared with the data value from the processor’s
local bus as a breakpoint trigger.
Data breakpoint mask. The 32-bit mask for the data breakpoint trigger. Clearing a DBR bit allows the
corresponding DBR bit to be compared to the appropriate bit of the processor’s local data bus. Setting
a DBMR bit causes that bit to be ignored.
Figure 30-9
Table 30-11. Access Size and Operand Data Location
shows the PC breakpoint register.
A[1:0]
00
01
10
11
0x
1x
Table 30-10. DBMR Field Descriptions
xx
Table 30-9. DBR Field Descriptions
Access Size
Longword
Word
Word
Byte
Byte
Byte
Byte
Description
Description
Operand Location
Table 30-11
D[31:24]
D[23:16]
D[31:16]
D[15:8]
D[15:0]
D[31:0]
D[7:0]
shows relationships between
Debug Support
30-13
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