MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 619

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 30
Debug Support
This chapter describes the Revision A enhanced hardware debug support.
30.1
The debug module is shown in
Debug support is divided into three areas:
Freescale Semiconductor
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•
•
Real-time trace support—The ability to determine the dynamic execution path through an
application is fundamental for debugging. The ColdFire solution implements an 8-bit parallel
output bus that reports processor execution status and data to an external emulator system. See
Section 30.3, “Real-Time Trace
Background debug mode (BDM)—Provides low-level debugging in the ColdFire processor
complex. In BDM, the processor complex is halted and a variety of commands can be sent to the
processor to access memory and registers. The external emulator uses a three-pin, serial,
full-duplex channel. See
“Programming
Real-time debug support—BDM requires the processor to be halted, which many real-time
embedded applications cannot do. Debug interrupts let real-time systems execute a unique service
routine that can quickly save the contents of key registers and variables and return the system to
normal operation. External development systems can access saved data because the hardware
supports concurrent operation of the processor and BDM-initiated commands. See
“Real-Time Debug
Overview
Enabling Flash security disables BDM communications.
Control
Model.”
BKPT
Support.”
Figure 30-1. Processor/Debug Module Interface
Figure
PST[3:0], DDATA[3:0]
Section 30.5, “Background Debug Mode
ColdFire CPU Core
Debug Module
Trace Port
CLKOUT
30-1.
Support.”
NOTE
Communication Port
DSCLK, DSI, DSO
(BDM),” and
High-speed
local bus
Section 30.4,
Section 30.6,
30-1