EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 334

IC STRATIX FPGA 10K LE 484-FBGA

EP1S10F484I6

Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S10F484I6

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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Enhanced PLLs
1–24
Stratix Device Handbook, Volume 2
The charge pump current directly affects the PLL bandwidth. The higher
the charge pump current, the higher the PLL bandwidth. You can choose
from a fixed set of values for the charge pump current.
the loop filter and the components that you can set via the Quartus II
software.
Figure 1–13. Loop Filter Programmable Components
Software Support
The Quartus II software provides two levels of programmable bandwidth
control. The first level allows you to enter a value for the desired
bandwidth directly into the Quartus II software using the MegaWizard
Plug-In Manager. Alternatively, you can set the bandwidth parameter in
the altpll function to the desired bandwidth. The Quartus II software
then chooses each individual bandwidth parameter to achieve the
desired setting. If designs cannot achieve the desired bandwidth setting,
the Quartus II software selects the closest achievable value. For preset
low, medium, and high bandwidth settings, the Quartus II software sets
the bandwidth as follows:
If you choose Auto bandwidth, the Quartus II software chooses the PLL
settings and you can get a bandwidth setting outside the 150-Khz to
2-Mhz range.
Low bandwidth is set at 150 KHz
Medium bandwidth is set at 800 KHz
High bandwidth is set at 2 Mhz
PFD
I
I
UP
DN
R
C
Figure 1–13
Altera Corporation
July 2005
shows
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