EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 446

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Stratix & Stratix GX I/O Banks
4–18
Stratix Device Handbook, Volume 2
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
PCI/PCIX//Compact PCI
AGP 1×
AGP 2×
SSTL-3 Class I
SSTL-3 Class II
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
Differential SSTL-2
(output clocks)
HSTL Class I
1.5-V HSTL Class I
1.8-V HSTL Class I
HSTL Class II
1.5-V HSTL Class II
1.8-V HSTL Class II
Differential HSTL (input
clocks)
Differential HSTL (output
clocks)
GTL
Table 4–2. I/O Standards Supported in Stratix I/O Banks (Part 1 of 2)
I/O Standard
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1
standards in addition to differential SSTL-2 and HSTL (both on the output
clock only). Since Stratix devices support both non-voltage-referenced
and voltage-referenced I/O standards, there are different guidelines
when working with either separately or when working with both.
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I/O Bank
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Enhanced PLL External
9
Clock Output Banks
Altera Corporation
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June 2006
12
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